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Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

At the 2021 IEEE IDM (International Conference on Electronic Devices), Intel announced and demonstrated key technological breakthroughs in packaging, transistors, and quantum physics that can promote the continued development of Moore's Law beyond the next decade.

According to reports, Intel's component research team is committed to innovation in three key areas:

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

The first is to integrate more transistors into future products by researching core scaling technologies.

Intel plans to solve the design, process process, and assembly problems through hybrid bonding, and increase the package interconnect density by more than 10 times.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

In July this year, Intel announced a new Coveros Direct packaging technology that can achieve bump spacing below 10 microns, increasing the interconnect density of 3D stacks by an order of magnitude.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density
Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

In the future, through GAA RibbonFET transistors and stacking multiple CMOS transistors, Intel plans to achieve up to 30-50% logic circuit scaling, and absorb more transistors per unit area.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

In the post-nano era, the Amy era, Intel will overcome the limitations of traditional silicon channels to make transistors from new materials that are only a few atoms thick, adding millions of individual transistors to each chip.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

The second is the new silicon technology.

For example, for the first time, gallium nitride-based power devices and silicon-based CMOS are integrated on 300mm wafers to achieve more efficient power supply technology, thereby powering the CPU with lower losses and higher speeds, while reducing motherboard components and footprint.

For example, the use of new ferroelectric materials, as the next generation of embedded DRAM technology, can provide greater memory capacity, lower latency read and write.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

The third is a new device based on quantum computing based on silicon transistors and large-scale and efficient computing at room temperature, which is expected to replace traditional MOSFET transistors in the future.

For example, the world's first room temperature magnetoelectric spin orbital (MESO) logic device, the future may be based on nanoscale magnet devices to produce a new transistor.

For example, intel and the Belgian Center for Microelectronics Research (IMEC) have made the research of spintronic materials in the field of spintronics research, making the device integration research close to the full practical application of spintronic devices.

For example, the complete 300 mm qubit process process can not only continuously shrink the transistor, but also be compatible with cmOS manufacturing lines.

Intel's key new breakthrough: 50% smaller transistors and 10 times more package density
Intel's key new breakthrough: 50% smaller transistors and 10 times more package density

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