Reporting by XinZhiyuan
Edit: Time Rayan
Huawei's independently developed 3D chip stacking technology, which is based on old nodes, can increase new performance, what will be the value of Huawei's new chip packaging and connection technology?
Huawei has reportedly developed and patented a chip stacking process that would cost much less than existing chip stacking processes.
However, Huawei's technology is based on old nodes, but improves chip performance.
And that could help Huawei avoid U.S. sanctions.
Why develop?
The U.S. government blacklisted Huawei and its chip design subsidiary, HiSilicon, and now requires all companies that make chips to apply for export licenses.
Moreover, all semiconductor production involves technology developed in the United States, and Huawei cannot access any modern nodes (such as TSMC's N5), but only relies on old nodes.
Guo Ping, Huawei's former rotating chairman, said at a recent press conference: "To this end, innovative chip packaging, chiplet interconnect technology, and special 3D stacking are ways for companies to make more transistors on a chip to achieve better performance in terms of competitiveness."
Therefore, it makes sense for the company to invest in a dedicated approach to packaging and interconnection.
"Micro and nano technologies, using 3D hybrid bonding technology as an example, will be the main means of extending Moore's law." Guo Ping said.
Huawei executives said that due to the relatively slow development of modern cutting-edge process technology, multi-chip designs in 2.5D or 3D packages are a common approach for chip designers, which can make more transistors on their products, which can meet customer expectations in terms of new features and new performance.
Guo Ping stressed that Huawei will continue to invest in area enhancing and stacking technology for internal design.
The press conference publicly and clearly stated that Huawei intends to use a hybrid free TSV3D stacking method in its upcoming products, or perhaps a similar, more mainstream approach.
The main question is whether this approach requires advanced tools or technology from the United States, after all, most manufacturing tools use technology derived from the United States.
However, it is unclear whether there is a foundry company that uses Huawei's patented technology to produce 3D chip packages for it.
But at least Huawei has a unique inexpensive 3D stacking technology that can help it stay competitive without using the latest nodes.
2.5D and 3D hybrid stacking
In the coming years, chip packaging innovation and multi-chip interconnect technology will be the key to cutting-edge processors.
As a result, all major chip developers and manufacturers today have their own proprietary approach to chip packaging and interconnection.
In general, chipmakers typically use two packaging and interconnection methods: a 2.5D package, where small chips adjacent to each other can achieve high-density/high-bandwidth in-package interconnects, and a 3D package, which stacks different small chips together, making the processor smaller.
However, 3D packages often require fairly complex cabling, as small chips need to have the ability to communicate and must use TSV (Through-Silicon-Via, silicon through-hole technology) to provide power.
TSV packaging technology
Although TSVs have been used in chip manufacturing for more than a decade, they increase the cost and complexity of the packaging process.
So, Huawei decided to study an alternative solution that didn't use TSV.
The solution, designed by Huawei experts, is essentially a hybrid of 2.5D and 3D stacking.
In this way, the two small chips overlap each other within the package, which can greatly save space, and is not completely stacked like the classic 3D package.
overlap
Huawei's approach is to use overlapping parts of small chips to establish logical interconnections.
At the same time, two or more chiplets still have their own PIN for power transmission and then use various methods to connect to their own redistribution layer (RDL).
Although Huawei's patented technology avoids the use of TSV (Through-Silicon-Via), it is not easy to implement and is not cheap.
TSV through-silicon technology
Huawei's solution is to invert one of the small chips before connecting another one.
In addition, it also needs to build at least two redistribution layers to provide power, which is not particularly cheap because it adds a few extra steps.
The good news is that a chip's redistribution layer can be used to connect memory, saving storage space.
It can be said that Huawei's hybrid 3D stacking is more common than the traditional 2.5D and 3D packaging technology applications of other companies.
For example, it's often difficult to stack two or three power-consuming and thermal logic dies together because cooling is very complex, which often means compromises on some other performance.
Huawei's approach increases the surface size of the stack, simplifying the cooling step.
At the same time, the stack is still smaller than the 2.5D package, which is critical for mobile applications such as smartphones, laptops or tablets.
Circumvent U.S. sanctions
It is worth noting that there are reports that Huawei plans to build semiconductor factories with SMIC international cooperation, and also bet on advanced packaging and interconnection technology to circumvent US government sanctions.
The company does not have access to the skills needed to produce chips using sub-10nm, so advanced packaging and interconnection methods are equally critical for SMIC.
However, other semiconductor contract manufacturers, such as TSMC and GlobalFoundries, as well as integrated design manufacturers such as Intel, Samsung, and even fabless chip developers such as AMD, have access to cutting-edge fab tools and technologies.
As a result, Huawei is developing their own 2.5D and 3D chip stacking technology and interconnection methods.
Resources:
https://www.ednchina.com/news/a9444.html
http://www.iotworld.com.cn/html/News/202204/67bbbf09e0d11b99.shtml
https://www.tomshardware.com/news/huawei-patents-stacked-chip-design-method-without-tsvs