In April 2022, China's one-stop IP and chip customization and GPU-enabled leading enterprise, Chip Technology, announced that it has taken the lead in launching a domestically independently developed IP solution with a physical layer compatible with the UCIe standard - Innolink Chiplet. It is reported that this is the first set of cross-process, cross-package Chiplet (core particle) connection solutions in China, and has been successfully verified in mass production on advanced processes.
Less than three weeks after Intel and ten other industry giants jointly launched UCle in early March, Chippe Technology launched a domestically independently developed IP solution with a physical layer compatible with the UCIe standard. "Chiplet Technology has been working in the field of Chiplet interconnection technology for many years, accumulating a large amount of customer application experience, and has close technical communication and cooperation with industry leaders such as Intel, TSMC, Samsung, and Micron., said. We started Innolink's R&D work more than two years ago and first unveiled Innolink A/B/C technology to the industry at the 2020 Design Reuse Global Conference, taking the lead in clarifying the DDR-based technology route of Innolink B/C. Thanks to the correct technical direction and advanced layout planning, Innolink's physical layer is consistent with UCIe standards, and eventually becomes the first in China and the world's leading Chiplet solution compatible with UCIe standards. ”
Infographic - Gao Zhuan spoke at the 2021 Domestic IP and Custom Chip Ecology Conference
Gao Zhuan said, "When UCle was released, we noticed that there are two specifications in the UCIe specification, standard package and advanced package, and these two specifications are very similar to the inline B and C of Core Dynamic Technology in terms of ideas and technical architecture, both of which are separately defined IO interfaces for standard packages and advanced packages, all of which are single-ended signals, all of which are forward clocks, all of which have Data valid signals, and all of which have side band channels." Based on Innolink B/C, Chiptron Technology quickly released IP products compatible with UCIe's two specifications, which can empower chip design companies at home and abroad and help them quickly launch Chiplet products that are compatible with UCIe standards. ”
According to the High School, around the Innolink Chiplet IP technology, Chiptron also provides a complete set of solutions such as package design, reliability verification, signal integrity analysis, DFT, thermal simulation, and test solutions.
Why does Chiplet Accurately grasp the technical direction of Chiplet and complete the design verification in a forward-looking manner, which is consistent with the technical direction of the later UCIe? In the view of the high-tech college, this is inseparable from the deep accumulation of Chiplet technology and the continuous leadership of authorized mass production, "The technology behind Innolink is extremely complex, but the core technology has mastered the world's leading core technologies such as high-speed SerDes, GDDR6/6X, LPDDR5/DDR5, HBM3, substrate and Interposer design scheme, high-speed signal integrity analysis, advanced process packaging, test methods, etc. And after a large number of customer needs landed and mass production verification iteration, so that we can 'take a broad view and about, thick and thin hair'. ”
It is understood that chiplet connection solution of Chiplet has been successfully verified in mass production on advanced processes, supporting the heterogeneous implementation of high-performance CPU/GPU/NPU chips. At the end of November 2021, Chippe Technology released the first 4K multi-channel high-performance graphics card in China - "Fenghua No. 1 GPU", of which the B-type card is through Innolink Chiplet technology, connecting multiple GPUs to achieve performance doubling.
What impact does the establishment of the UCIe Alliance have on Chiplet technology? In the view of the high school, UCIe based on the DDR technology route as an open, industry-common Chiplet high-speed interconnection standard, it can achieve package-level interconnection between small chips, with high bandwidth, low latency, low cost, low power consumption, strong flexibility and other advantages, unique in technology, standardized to achieve interconnection, can meet the entire computing field including cloud, edge, enterprise, 5G, automotive, high-performance computing and mobile devices, etc., for computing power, memory, There is a growing demand for storage and interconnects. "In layman's terms, UCIe is a chiplet after the unified standard, with the ability to package and integrate different Die, which can come from different fabs or use different designs and packaging methods. This standard is very meaningful for chiplet's open prosperity, and it achieves stronger empowerment through the unification of interface technology routes. ”
Gao Zhuan believes that "Chiplet technology is of great strategic significance for the current breakthrough of the computing power bottleneck of large computing chips such as AI and CPU/GPU, and is also one of the key technologies to solve the problem of 'card neck' in the wafer process in the process of high-quality development in the mainland", he said, for example, "You can see that whether it is the Ponte Vecchio chip presented by Intel in ISSCC 2022, or the M1 Ultra chip released by Apple a few days ago, Chiplet technology is used, and AMD's Chiplet CPU has proven to be a very successful product. ”
The high school calls for the current situation, the UCIe specification in the software protocol layer and the physical layer are more in line with the application scenarios of Chiplet, domestic companies can actively participate in the UCIe ecology, and actively launch competitive UCIe-based products, "In the long run, domestic chip companies need to continuously enhance their strength in the field of high-performance computing chips, work together, and come up with first-class chiplet products." When our chip products and chip ecology are strong enough, it is a matter of course to participate in the formulation of norms. ”