The cost advantages of universal adhesives also have limitations.
”
Author | Wu You
Edit | Bao Yonggang
"Splicing" chips seems to have become the new "fashion" of the chip circle.
Apple's spring new product launch in March released the M1 Ultra, which "glued" two M1 Max chips, claiming to surpass Intel's top CPU i9 12900K and GPU performance ceiling Nvidia RTX3090. Nvidia also announced at the MARCH GTC that the Grace CPU super chip, which is "glued" with two CPUs, is expected to perform 2 to 3 times the performance of the top CPU of the 5th generation that has not yet been released.
Earlier, AMD also used the step of "bonding" in its EYPC series of CPUs, reducing chip design costs by half.
The "bonding" of its own chips seems to be no longer a problem, so can we select the best performing chips from the global market to glue together to create more powerful chips?
A few weeks ago, a "universal glue" that can realize chip interconnection appeared, and chip companies such as Intel, AMD, and TSMC jointly established a small chip interconnect industry alliance to customize the UCIe 1.0 (Universal Chiplet Interconnect Express) standard.
If the interconnection method of the same chip company (such as NVIDIA's NVlink) is regarded as a glue that can only glue one material and has a single function, then the proposal of the UCIe standard means that the prototype of the chip universal adhesive that can realize the interconnection of various chips has begun to appear.
Does the chip universal glue have enough ability to replace the shrinking transistors and become the "life-sustaining Dan" of Moore's Law?
1
The real starting point of the "glue" chip era
"Glue" chip development has been for a period of time, but the industry has been independent, because there is no unified interface standards, "glue" chip ecology is difficult to build, large companies have stopped moving forward, small companies do not dare to take the first step.
For a long time, the continuous evolution of Moore's Law was seen as the main way to improve the performance of chips.
After more than 40 years of development, the transistors that make up the chip are almost reduced to the atomic level, not only facing the problem of physical limits that are difficult to break through, but also the input-output ratio of process upgrades has dropped significantly, and the industry has begun to find new ways to improve product performance, for example, by changing the way of packaging to increase transistor density.
Gordon, who proposed Moore's Law, himself recognized the importance of packaging, writing in the paper: "It turns out that it may be more economical to build large systems with smaller functional modules that will be encapsulated and interconnected separately." "
To put it simply, that is, the original production of the chip into a package, to achieve the purpose of reducing product development time and cost, these chip modules can be different process nodes, and finally connected together by a die-to-die manner, which is similar to the model formed by connecting the chip with glue, which is called chiplet (can be translated as core particles, small chip) model in the industry.
Over the years, AMD, Intel, TSMC, Marvell and other chip companies have introduced some chip-like designs, for example, Intel has adopted a small chip method called Flouros, launched a CPU platform in 3D packaging, which integrates 1 10nm processor core and 4 22nm processor core packages; TSMC is also developing a technology called Integrated System on Chip (SoIC).
In these technologies, the interconnect of the die to the die is crucial, that is, the need to "glue" one die to the other, each of which contains an IP module with a physical interface, and the public interface can interconnect the two dies.
In Chiplet's early explorations, many companies developed interconnects with proprietary interfaces to interconnect their own chip models.
Since Chiplet's ultimate goal is to obtain high-quality and interoperable chip modules internally or from multiple chip vendors, whether Chiplet can go further depends on whether there is a standard interface in the industry that can connect different chip models, that is, chip "universal glue" that can glue together various chip modules.
At the beginning of March this year, universal glue UCIe finally appeared, and the glue era of chips ushered in a new starting point.
"The landing of open standards in each industry will trigger the outbreak of this industry, following the development law of this industry, UCIe is of great significance to the development of Chiplet and is an important symbol of the arrival of the Chiplet era." Wang Hongbo, founder of semiconductor equipment company Huafeng Technology, told Leifeng Network.
"Chiplet has been promoted in the industry for many years, has been promoting, but has not been promoting industrialization, in large part because it is waiting for the standard to be established. If you choose a wrong standard, the results will not be recognized by the market, and a lot of energy will be wasted. Dai Weimin, founder, chairman and president of VeriSilicon, said.
However, before UCIe was established, there were already various interface types in the industry, does the emergence of "universal glue" mean that the previous efforts of chip companies that have explored the chiplet field have been wasted?
Wang Hongbo believes that Chiplet only means connecting different chip modules through advanced packaging. "In the early stage of Chiplet's development, each company will independently invest and research Chiplet according to its own product needs, first make technological breakthroughs in some aspects, and then converge into industry standards, which is a normal development process."
Liu Hongjun, deputy general manager of Jingfang Technology, believes that the formulation of UCIe standards will definitely use some of the originally defined protocols and familiar protocols, but there are also some new standards and packaging integration methods that need to be redefined to achieve better interoperability. "UCIe does not overturn the industry's previous work, but standardizes the technology of small chip interconnection."
To understand the positive effects of UCIe on the chiplet era, it can be compared to PCIe, and at the protocol level, UCIe can even be understood as an extension of PCIe in the micro-interconnect structure.
"The previous PCIe solved the data transmission problem of computer systems and peripheral equipment, UCIe solved the problem of data transmission between small chips and small chips, independent modules and modules on the package chip, if there is no unified electrical signal standard, it will not form a number of enterprises to jointly complete the ecological cooperation of system integration, if there is no cooperation, it is difficult for a single enterprise to enter chiplet to complete the ecological construction required for the development of the industry." Liu Hongjun said.
Wang Hongbo also expressed the same view, "In the PC era, the x86 system led by Intel has a series of standards, such as: PCIe standard, which can make other products can cooperate with Intel's CPU division of labor, a series of standards of the x86 system, and build the hardware system of the entire PC era. It is also necessary to rely on the UCIe standard to easily combine the chip designs of different companies in a chip, in this way to establish an ecosystem and promote the development of the entire industry. "
However, PCIe has gone through more than a decade of development to become mainstream, and the emergence of UCIe 1.0 is only the starting point for the real arrival of the Chiplet era, and there is still a long way to go before Chiplet really becomes mainstream. Even powerful people like Intel take a lot of time and effort to achieve mass production.
2
Process realization becomes the first difficulty,
No one is willing to bear the cost of the project
"In fact, the biggest difficulty in the development of Chiplet is not in the formulation of protocols, but in product definition and manufacturing, and unified protocols and standards are to reduce research and development costs and accelerate market applications." Liu Lingtao, investment director of Chuangxiang Investment, told Leifeng Network.
Liu Hongjun holds the same view, he believes that although the establishment of the UCIe unified standard has pointed out the direction for the industry, there are still many challenges in the process capability requirements and large-scale manufacturing links brought about by the specific physical layer indicators, such as the stacking of multi-layer materials in the package body, from the stacking between silicon to silicon, organic materials, metals and other materials.
"Connecting these materials requires small leads and line widths, high complexity, high yields are greatly affected by the process, and the cost is high."
Liu Hongjun said.
Taking Intel's EMIB as an example, from the public paper released by Intel, it can be found that EMIB faces many problems in process implementation, and needs to develop materials and processes, and the design work of its silicon bridge needs to be jointly implemented by senior engineers who understand materials, packaging, processes and signal integrity.
In addition, wafer manufacturing materials and equipment need to be improved, and their time and cost are unaffordable except for Apple, Intel and other head chip companies.
Not only that, even with UCIe, the chip universal glue, the problem of "where is chiplet" is difficult to solve.
"After UCIe, Chiplet was faced with the problem of Chiplet suppliers and app vendors who took the first step first. It's also a 'chicken and egg' issue. Chiplet suppliers are more concerned about who should bear the one-time engineering costs (NRE) of Chiplet, while application providers are worried about whether there is enough wealth of Chiplets to apply, and when the price/performance of Chiplet products will be verified first. Dai Weimin said.
Because of this, even with the UCIe standard, everyone is easy to stay in the wait-and-see stage, waiting for the first person to eat crab to appear. "VeriSilicon is actively communicating with companies interested in using Chiplet and trying to explore ways to 'crowdfund' Chiplet from potential customers, which is expected to break the deadlock as soon as possible." Dai Weimin added.
3
Continued life Moore's law, universal glue chip is not omnipotent
Putting aside the process problem, the key to the popularity of chip universal glue is whether Moore's Law can be continued to give chip companies greater value.
From the perspective of the industrial chain, on the one hand, Chiplet as a technology trend in the semiconductor industry, requires each chip company to do the best work in its own position, through the division of labor to reduce the chiplet chip and market demand matching time and cycle, so the connection between chip companies will be more close, on the other hand, chip universal glue seems to be rewriting the evaluation system or dimension of chip companies or chip products.
"All along, the most advanced front-channel wafer process nodes are often a symbol of the best performance of the chip, and the most advanced process nodes often lead the trend of chip performance development. But in the Chiplet era, the competitiveness of a single advanced process node may be replaced by multi-chip heterogeneous system integration, and heterogeneous integration capabilities are gradually becoming the new standard for evaluating a chip design or manufacturing company. Liu Hongjun added.
"It is precisely for this reason that Intel has led the participation in the establishment of the UCIe standard in order to build an ecosystem around Chiplet technology, which is crucial for its IDM 2.0 strategic upgrade."
It is worth mentioning that when the importance of advanced processes to chip performance improvement is weakened, it is beneficial to the development of the chip industry that is not leading in the field of wafer manufacturing Chinese mainland, especially Chinese mainland ranks at the forefront of the world in the field of advanced packaging and testing, and the Chiplet era is expected to occupy a certain advantage.
"Compared with advanced manufacturing, in advanced packaging, the gap between China and the international advanced level is not large, and the emergence of Chiplet is beneficial to the development of the mainland chip industry." Dai Weimin said.
From the perspective of cost advantages, although AMD and Intel have proved that multi-chip architectures have certain economics, in fact, compared with microtransistors, chip universal adhesives do not bring the greatest cost advantage at all times.
Feng Yinxiao, a ph.D. student at Tsinghua University's Institute of Intersections, and Kaisheng Ma, an assistant professor at Tsinghua University's Institute of Intersections, published a paper on Chiplet cost calculation, which accurately assessed the cost-effectiveness of multi-chip integrated systems by establishing a cost model for Chiplet actuaries.
The results show that the chiplets scheme at this stage is only really profitable on a large chip of 800 square millimeters, and the more advanced the process, the more obvious the benefit effect. For 5nm chip systems, multi-chip architectures began to pay off when production reached 20 million.
Dai Weimin also said that not all chips are suitable for the way of chiplet, do not split for the sake of splitting, in many cases a single integrated system chip (SoC), such as the Internet of Things system chip based on the FD-SOI process integrated radio frequency wireless connection function, is more valuable.
"Tablet application processors, autonomous driving domain processors, and data center application processors will be the three areas where Chiplet has taken the lead in landing. It is also the driving force behind the problem of chiplet 'chicken' and 'egg'. ”
That is to say, although Chiplet has the ability to continue Moore's Law, for the vast majority of less advanced chip companies, there is no need to pay for chip universal adhesives early. Therefore, it is understandable why the UCIe Industry Alliance was jointly built by several chip giants.
But it is undeniable that the upgrade of performance, power consumption and area is still the goal of the chip industry, as more and more terminal products begin to use more advanced processes, the mainstream era of chip universal adhesive will not be far away.
There will be a day, but when the reuse ability of the chip universal glue reaches a certain level, it has the ability to completely overcome the transistor integration.
END