Introduction
Integration, integration, refers to the process of bringing different functional units together and being able to achieve their specific functions, integration refers to human activities, integrated circuits, system integration is a more common term. In the previous article, the scale and dimension of integration, we analyzed the integration from two aspects: scale and dimension. In this article, we analyze modern electronic integration technology from the two aspects of level-level and link-Step.
Integration
1
The hierarchy of integration
The integration of electronic systems is mainly divided into three levels (Level): integration on the chip, integration within the package, and PCB board level integration, as shown in the following figure:
The basic unit integrated on the chip is the transistor, which we call a function cell, and a large number of functional cells are integrated together to form the chip.
The basic unit integrated within the package is the bare chip or chip chip chiplet completed in the previous step, which we call the Function Unit, which is integrated in the package to form a SiP.
The basic unit of integration on the PCB is the package, or SiP, which we call MicroSystem, which is integrated on the PCB as a larger system.
It can be seen that the level of integration is carried out step by step, and the integration of each level is continuously improved on the basis of the previous level, and the scale is constantly amplified.
At the level of PCB, the functions of electronic systems have been relatively complete, the scale has been enlarged to the point where it is suitable for human control, and other components constitute the most commonly used systems - common systems, such as mobile phones or computers that we contact every day.
Integration on the chip
The transistor on the chip is called a functional cell because it is the smallest functional unit that is indivisible.
The number of functional cells has also become an important indicator of the advanced nature of the system, the number of cells in the human body is 40 to 60 trillion, if the system wants to truly become a system as intelligent as a human, it may contain functional cells to reach the same order of magnitude.
In order to integrate more functional cells, the transistors can only be made smaller and smaller. Today's transistors may be only one hundred millionth the size of the original transistor when they were first invented, but their basic functions have not changed.
The integration on the chip, first of all, to make functional cells, and integrate them together, how are these transistors as functional cells made and integrated? From a minimalist point of view, we need to understand three types of materials and three types of processes.
Conductors, semiconductors, insulators
Although there are many materials on the chip, the materials used in modern integrated circuits are almost exhausted by the periodic table, and all the materials can be divided into three categories: conductors, semiconductors, and insulators.
Conductors are responsible for transmitting electrons, insulators are responsible for isolating electrons, the most important of which is naturally semiconductors, because it is variable, it sometimes becomes a conductor (conduction), allowing electrons to pass through, sometimes can become insulators (shutdown), blocking the passage of electrons. Moreover, this change is controllable, controlled by designing a special structure and applying current or voltage.
In the conductor, the conduction band overlaps with the valence band, where there is no bandgap, the electron is easy to move, forming a current under the applied electric field; in the semiconductor, a small number of electrons can jump to the conduction band and form a current under the applied electric field; in the insulator, the electron cannot cross the band gap, so it cannot form a current.
Add process, subtract process, graph transfer
There are many processes for manufacturing chips, and there are thousands of processes to complete the manufacture of a chip, which can be divided into three categories: addition process, subtraction process, and graphic transfer.
The addition process is simply to add materials to the substrate, for example, ion implantation, sputtering, chemical vapor deposition CVD, physical meteorological sedimentation PVD, etc. can be classified as additive processes. Reduced process is simply to remove materials, such as etching, chemical mechanical polishing CMP, wafer integrity can be classified as subtraction process.
Graphic transfer is the most and most difficult of the three types of processes, because each step of the addition or subtraction process is basically based on graphic transfer. Graphic transfer is the design of the shape, the transfer of the wafer, involving masks, lithography, photoresist. The transfer of graphics is actually the transfer of human thinking and wisdom.
Each step of the process of addition or subtraction before and after the need for graphic transfer, so that a specific pattern can be made on the chip. These patterns are multi-layered, combining semiconductors, conductors, and insulators to form a specific three-dimensional structure, creating functional cells in the wafer plane and achieving corresponding functions. Three types of materials + three types of processes can create such a complex chip, and it really responds to the ancients' saying of "two lifetimes, two births, three births, three births of all things". After thousands of processes, the product integrated on the chip is the wafer, and after the wafer is cut, the chip Chip or chiplet is formed to prepare for the next level of integration.
Integration within the package
Not all chips or cores need to be integrated in the package, and a single chip can also be packaged directly and applied to the PCB board. However, as Moore's Law becomes more and more invalid, integration in the package is more and more important, SiP, advanced packaging, Chiplet, heterogeneous integration, 2.5D, 3D and other concepts have increasingly become the focus of attention in the industry, and the integration in the package has finally ushered in the spring.
The integration in the package does not use the characteristics of semiconductors, so the materials used for integration in the package are mainly divided into two categories: conductors and insulators, and the main purpose of integration is to integrate the chip or core particles completed at the previous level (integration on the chip) in the package and electrically interconnected to form a microsystem. The original packages are single-chip, and there is no concept of integration, and the main functions of traditional single-chip packaging are three: chip protection, scale amplification, and electrical connection. The multi-chip package represented by SiP adds three functions on the basis of the traditional package: improving the function density, shortening the interconnection length, and reconstructing the system. Integration within the package relieves the pressure on chip integration, making it a divine weapon to delay the end of Moore's Law. Integration within the package is much less difficult because it does not require the manufacture of functional cells (Transistors), but only the functional cells (chiplets) are assembled.
Another feature of the integration in the package is the high degree of flexibility, which can be divided into five integrated dimensions: 2D, 2D+, 2.5D, 3D, and 4D (see: Integrated Scale and Dimension for details).
The result of the integration within the package is to form a functional unit represented by SiP and advanced packaging, which we can call a microsystem.
Integration on pcbs
From the history of electronic integration, the integration on the PCB should be the earliest to appear, the emergence of the PCB is 11 years earlier than the package, 22 years earlier than the integrated circuit.
Before the advent of PCBs, components were directly connected with wires, in addition to being very messy, the integration density was also difficult to improve.
Although compared with integrated circuits and packages, PCB appeared earliest in history, but due to the limitation of package size and package pin density, the development of integration technology on PCB is relatively slow, from the initial single-panel development to double-sided, multi-layer board, assembly process is also developed from plug-in to surface mount SMT, assembly density is also getting higher and higher.
Today, PCBs are basically double-sided mounted components, the board layer can also reach dozens of layers, high-density HDI board, rigid and flexible combination board, microwave circuit board, buried device board and so on are widely used.
Like integration within the package, semiconductor features are not used for integration on the PCB, so the materials used are mainly divided into two categories: conductors and insulators. The main purpose of integration is to integrate the microsystem module completed at the previous level (integration within the package) again and electrically interconnect it, and together with other components, form a common system, such as our commonly used mobile phones and computers.
2
Integration links
Above we described the three levels of integration of electronic systems: integration on the chip, integration within the package, and integration at the PCB board level. Each level of integration is divided into different links.
Integrated links on the chip
Integration on the chip is mainly divided into two major links: device manufacturing and metal interconnection, also known as front-stage process FEOL and post-process BEOL.
Device Manufacturing (Front Process)
Device manufacturing is to create transistors, resistors, capacitors, diodes, etc., which we call functional cells, through lithography, etching, ion implantation, sputtering, chemical vapor deposition, physical meteorological deposition, chemical mechanical polishing, and wafer integrity on monocrystalline silicon wafers. The current 5nm process can produce more than 100 million transistors on an area of 1mm mm. The manufacturing process of transistors mainly includes isolation, gate structure, source leakage, contact holes and other formation processes, which are generally called the front stage process (FEOL, Front End of Line).
Monocrystalline silicon can be formed by ion implantation, N, N+, N-, P, P+, P- and other semiconductors with different concentrations, and polycrystalline silicon is used as a gate or resistor.
The figure below shows a picture of the FinFET transistor under a microscope, where the higher white beam is gate G and the low beam is Fin, which is about 0.67 times the width of the gate, and the gate is flanked by source level S and drain D.
Metal interconnects (post-process)
After the transistor layer is manufactured, the transistor and the first layer of wiring are connected by tungsten and other metal contact holes, and then electrical interconnection is carried out through multi-layer metal wiring and vias, and the earlier chip is wired with aluminum, and now the chip is mostly wired with copper.
The manufacture of multilayer metal wiring for connecting transistors and other devices mainly includes media deposition between interconnect lines, the formation of metal wires, and the formation of lead pads, generally referred to as the post-stage process (BEOL, Back End of Line).
The conductors used in the metal interconnect are tungsten, copper, aluminum and other metals, and the insulators are silicon oxide, silicon nitride, high dielectric constant film, low dielectric constant film, polyimide and so on.
The figure below shows a photo of the metal interconnect on the chip under the microscope, and the multi-layer wiring structure can be seen, and the current process can support more than 10 layers of metal wiring.
The more advanced the integrated circuit process, due to the smaller and smaller structural size, various effects emerge in an endless stream, in order to solve these effects, to create a normal function of the transistor, the use of more and more types of elements, almost a exhaustion of the periodic table of movement.
The figure below shows a schematic diagram of the structure of the pre-process FEOL and the post-process BEOL, where transistors are first fabricated on a silicon substrate and then connected by metal interconnects and drawn out to the PAD of the chip.
Integration within the package
The earlier package was relatively simple, mainly playing the role of chip protection, scale amplification, and electrical interconnection. The schematic diagram is roughly as follows, through the bonding line Bond Wire to connect the chip's PAD to the package substrate or lead frame, and then connected to the external pins, through the pin arrangement, can be divided into BGA, CGA, QFP, LCC, SOP, DIP and other packaging forms.
The traditional package is relatively single in internal structure, which is a lead frame or substrate that connects the chip pins with bonding wires, while the external pin arrangement is diverse, so people talk about packaging, and what they talk about is the various packaging forms outside. Therefore, we say: the traditional package is heavy on the outside and not on the inside. In the era of SiP and advanced packaging, this situation has undergone a huge change, SiP and advanced packaging its external packaging form is gradually unified to more pinout, more interconnect density BGA, CGA and other packaging forms, and the package inside due to the integrated function, its structure has become more and more complex, people's attention to the packaging gradually from the external packaging form to the internal packaging structure. Therefore, we say: advanced packaging is heavy inside, not outside.
In order to improve the functional density in the package, it is necessary to integrate more functional units in the package, the traditional bonding wire connection method has been unable to meet the requirements, people have invented a variety of advanced packaging technology, let's take a look at the most typical technology.
RDL and TSV production on the chip
Routing on the surface of the chip, connecting the PAD to a looser position through the RDL (Redistribution Layer) rerouting layer and making a bump Bump, which we call an extension of the XY plane. Then through Bump, the chip can be mounted directly on the substrate, this process is called flip chip, look at the following figure, you will understand why it is called flip.
The flip welding process appeared in the 1960s, and the bonding line is basically a product of the same era, the history has been a long time, I generally do not call it advanced packaging. Because the flip-mounted solder chip cannot be stacked, it is impossible to extend the Z axis, and people have invented a through-hole technology that can penetrate the entire chip body, known as TSV (Through Silicon Via) technology. TSV has many process difficulties to overcome, and I think the most important thing to solve is the position selection and aperture reduction of TSV. Because the TSV needs to pass through the entire chip body, the position selection is not good and the internal circuit connections and transistors will be damaged, so the location selection is important. The aperture is also reduced to take up as little space on the chip as possible. After all, 1mm area can place more than 100 million transistors, and if you can't get a few hundred million, you can't get a few hundred million at once.
However, the development of TSV technology is also increasingly strong, and it is said that up to one million TSVs can be etched in a 1mm area, which can fully meet the needs of high-density interconnection.
The following figure is a schematic diagram of the TSV on the chip, through which the upper and lower surfaces of the chip can be connected through metal conductors, which is ready for chip stacking.
Making TSV on a chip is simply too difficult to do, and only the head's Foundry factory can do it, which is often referred to as 3D TSV.
In order to further improve the degree of integration, people have invented a TSV on the silicon substrate Interposer, known as 2.5D TSV.
RDL and TSV production on Interposer
Interposer is known as a silicon adapter board, an inserter that can provide a higher interconnect density than a normal substrate.
The figure below shows a typical silicon adapter plate, with 3 layers of metal above and 2 layers of metal below, connected by silicon through holes in the middle, which we call a 3+2 structure.
The TSV on Interposer is usually larger than the TSV on the chip, the density is smaller, and the production difficulty is lower, and the CURRENT OSAT packaging and testing factory can process such 2.5D TSV. With Interposer in place, we can mount the chip or core particles on the silicon adapter board. As shown in the figure below, because the structure contains both 3D TSV and 2.5D TSV, we call it the 2.5D+3D advanced package.
Interconnection line production on Substrate
In the next step, we also need to make a package substrate Substrate, which has a wider variety of materials, which can be divided into organic substrates and ceramic substrates.
The organic substrate is made of organic resin and glass fiber cloth as the main material, and the conductor is usually copper foil. Organic resins typically include: epoxy resin (FR4), BT resin (bismaleimide triazine resin), PPE resin (polyphenylene ether resin), PI resin (polyimide resin) and the like. Ceramic substrates have better mechanical properties and thermal properties than organic substrates, and usually contain ceramic substrates such as HTCC, LTCC, and aluminum nitride. The figure below shows a typical organic substrate structure, the middle 4 layers are made by the Laminate lamination method, and the 2 layers on the upper and lower surfaces are manufactured by the Buildup multilayer method, which we call the 2+4+2 structure.
The package substrate is typically mounted on the top and connected by BGA and PCB at the bottom.
Device assembly and packaging
Below, we assemble Chiplet, Inteposer, substrate, and process them using advanced packaging technology to form a complete advanced package.
The result of the integration in the package has the function of the system and is so small that we can call it SiP or microsystem.
Integration on the PCB
After the chip is integrated in the package, the size is not large enough, and some discrete components, such as large capacitors, transformers, etc., cannot be integrated into the chip package, so for electronic products, PCB is always essential.
Production of PCB interconnect lines
The manufacturing process of PCB is similar to that of organic substrates, its wiring density is not as high as that of organic substrates, and the structure is relatively simple. PcB mostly use through-hole structure, although now high-density HDI board also uses blind buried hole structure, but through-hole due to simple structure, low cost, has been widely used in PCB. The figure below shows a 6-layer through-hole PCB through which the device can be secured and electrically interconnected.
Component assembly on the PCB
After the PCB is processed, the packaged components need to be assembled on the PCB, as shown in the following figure, and connected to the external plug-in and the external device through the PCB.
Full image from Transistor to PCB
Below, we give a full diagram of the integration from transistor to PCB, as follows:
(This figure is recommended for readers to save, as it may be the industry's first full-scale diagram of a level 5 circuit integration from transistor to PCB, hand-drawn by Suny Li.) Because it is a schematic, it is not drawn strictly according to the scale, in fact, from the transistor to the PCB, the size is expanded by about 1,000,000 times)
After the transistor (NMOS or PMOS) is manufactured on the silicon substrate, it is connected to the metal wiring on the chip through contact holes, then to the Pad of the chip, then to the 3DTSV through RDL, to the RDL and 2.5DTSV on the silicon adapter board via uBump, then to the package substrate via Bump, then to the BGA through the wiring and vias on the package substrate, and finally to the wiring and vias on the PCB. From the transistor to the PCB, the complete 5-stage electrical signal path is as follows:
TransitorContactCopperPadRDL 3DTSVuBumpRDL 2.5DTSVBumpTrace Via BGATrace Via PCB
On integrated circuit chips, humans have realized the creation of functions through transistors, realized the reconstruction of functions and scale amplification on SiP or advanced packages, and further reconstructed functions and scaled up on PCBs. From transistors to PCBs, the scale is magnified a million times and can match the scale of humans themselves. In the end, the PCB and other components were organically combined to become a mobile phone that can be operated anytime and anywhere in the hands of modern people and a computer that can hardly leave at work.