Intel Demonstrates Multiple Technological Breakthroughs to Increase Future Transistor Shrinkage By 30% to 50%

At the recent 2021 IEEE International Conference on Electronic Devices (IEDM), Intel outlined its future technology direction, introducing key technologies in packaging, transistors, and quantum physics. Intel said that the current major breakthroughs in new power devices and memory technologies, which are derived from new concepts in physics, are likely to redefine computing in the future.

Intel's disclosure of breakthrough technology advances involves the exploration of three areas that will extend Moore's Law into 2025 and beyond.

First, Intel will provide more transistors in future products, so it will focus on core microfilm technology. By employing solutions to design, process processes, and assembly challenges in hybrid bonded interconnects, Intel expects to increase interconnect density by more than 10x in packaging. To enable the ecosystem to benefit from advanced packaging, Intel is calling for new industry standards and test procedures to enable the hybrid bonding chiplet ecosystem.

In fact, in the latest process roadmap released in July this year, Intel said that through The Coveros Direct, the transition to direct copper-to-copper bonding and low-resistance interconnects have been achieved, resulting in a bump spacing of less than 10 microns, increasing the interconnect density of 3D stacks by an order of magnitude, and the boundary between wafer fabrication and packaging in the future will be less obvious, and it is expected to be used in mass production products in 2023.

Intel envisions its GAI RibbonFET (Gate-All-Around RibbonFET) technology, which enables up to 30% to 50% logic scaling by stacking multiple (CMOS) transistors to accommodate more transistors per square millimeter. This also paves the way for Intel to enter the Amy era, where it will overcome the limitations of traditional silicon channels and manufacture transistors from new materials that are only a few atoms thick to increase the number of transistors on each chip for more powerful computing performance.

Second, Intel injects new features into silicon. More efficient power technology is achieved by integrating Gallium Nitride-based (GaN-based) power devices with silicon-based CMOS for the first time on 300 mm wafers. It creates the conditions for the CPU to deliver low-loss, high-speed power while also reducing motherboard components and space.

Intel also intends to leverage new ferroelectric materials as a viable solution for the next generation of embedded DRAM technology. New technologies provide greater memory resources and low-latency read and write capabilities to solve the responsible problems currently faced in applications ranging from games to AI computing.

Finally, Intel is working to improve the quantum computing performance of silicon-based semiconductors. By developing new devices that can perform efficient, low-power computing at room temperature, we are gradually replacing traditional MOSFET transistors. At this conference, Intel demonstrated the world's first room temperature magnetoelectric spin orbital (MESO) logic device, and it is possible to manufacture new transistors based on nanoscale magnet devices in the future.

At present, Intel has made progress in the research of spintronic materials, so that the device integration research is close to realizing the full practical application of spintronic devices. In addition, Intel also demonstrated the complete 300 mm qubit process flow, not only sustainable miniature, but also compatible with CMOS manufacturing, which also determines Intel's future research direction.

Robert Chau, senior fellow and general manager of Intel's component research division, said the key research breakthroughs shared at the conference will lead to revolutionary process processes and packaging technologies to meet the industry and society's unlimited demand for powerful computing. This is the result of the unremitting efforts of Intel's R&D team, and will continue to stand at the forefront of technological innovation in the future and continue Moore's Law.