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Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

Pat Kissinger visits TSMC:

Intel needs TSMC's advanced process foundry services, but it also competes fiercely with TSMC in terms of winning the support funds of american semiconductors, and the two sides have both cooperation and competition, and the relationship is very delicate. Intel CEO Pat Kissinger held a closed-door meeting with TSMC on the first leg of his Asian tour.

Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

Both The Alchemy and Ponte Vecchio GPUs that Intel plans to release next year will require TSMC FOUNDRies, and the 14th-generation Core Meteor Lake, which is expected to be available the following year, may also contain components that are partially foundry by TSMC. Pat Kissinger's trip should go all out to ensure that TSMC can provide it with sufficient supply.

Pat Kissinger will also travel to Malaysia this week, where Intel is likely to announce a $7.1 billion investment in Penang to build a new chip packaging plant.

Samsung IBM jointly launches VTFET vertical transistors:

Samsung and IBM give their own answer to the continuation of Moore's Law: VTFETs transmit field-effect transistors vertically. Compared to scaled FinFETs, VTFETs can double performance or reduce energy consumption by 85%.

Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

Traditional transistors are fabricated to be placed horizontally, with current flowing horizontally from side to side, and now the lateral architecture approaches the zoom limit at aggressive gate spacing.

Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

With the new VTFET, IBM and Samsung succeeded in building transistors perpendicular to the surface of the chip, with a vertical or up-and-down current: "Freed from the limitations of lateral layout and current flow, we were able to use larger source/drain contacts to increase the current on the device. The gate length can be selected to optimize the device drive current and leakage, while the isolation layer thickness can be independently optimized to reduce capacitance. We are no longer forced to make trade-offs between gate, isolator, and contact size, which increases switching speed and reduces power consumption. ”

Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

The VTFET process solves many performance hurdles and limitations, and IBM believes it represents a huge leap forward in building the next generation of transistors that will enable smaller, more powerful and more energy-efficient devices to be manufactured in the coming years.

Intel CEO Asia Visits TSMC, Samsung and IBM to develop VTFET vertical transistor technology

Maybe the end of Moore's Law will be like a crisis of oil depletion, seemingly imminent, but it will not really come soon?

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