3nm chip: TSMC and Samsung "decide life and death", Apple watches the battle from the other side丨 Liangsee 39 issues

Finishing Editor / Yangbo Zhao

Apple's annual flagship iPhone 15 Pro series of A17 Pro chips, the first TSMC N3 process, brought the industry into the 3nm era.

According to official data, the number of transistors of the A17 Pro using the N3 process has reached a staggering 19 billion, compared with its previous generation of products, the A16 Bionic chip using the 4nm process is only 16 billion.

Apple kicked off the 3nm era, but also set off a fierce technical and market battle, guarding the foundry giant TSMC, and launching a fierce challenge is Samsung and Intel.

Samsung is an upstart in the wafer foundry market, in 2010 began to undertake iPhone processor A4 foundry orders, by 2014, Apple adjusted its strategy, transferred part of the orders to TSMC, until all into the arms of TSMC, completely abandon Samsung.

In order to fight back, Samsung bet heavily on the 3nm node, based on GAAFET self-developed MBCFET architecture, trying to compete with TSMC and regain lost orders and customers, a potential signal is that NVIDIA is testing its 3nm process with Samsung.

The game between Samsung and TSMC between 3nm is considered to be "both high and low, but also life and death".

On September 19, Liangjian and Tencent Technology specially invited a well-known semiconductor investor and Tencent news author What is Brother Qi's plan Chen Qi, live broadcast interpretation of the 3nm battle of foundry giants, telling Samsung and TSMC's respective 3nm roadmap and market prospects.

The following is the dehydration version of the live essence (with deletions and adjustments without changing the original meaning)

01

Revisiting 3nm: Where is the limit of chip processing?

Liu Xingliang: Recently, the industry is discussing 3nm, what does 3nm mean here?

Chen Qi: Since a few years ago, China's emphasis on the semiconductor industry has gradually increased. News attention to the chip industry is also increasing. What is the significance of our values from 28nm to 45nm to now at the 3nm level?

The actual characteristic size (CD) of the early transistor, which corresponds one-to-one to the process node. For example, if the transistor feature size is 250nm on an 8-inch wafer, the corresponding is the 250nm process.

After 45nm to 28nm, transistors begin to shrink, the actual size of the transistor begins to differ from the nominal method of the process node, and the transistor is named using the equivalent nominal method.

Consider an Audi A6 45TFSI car with a turbocharged engine. It is roughly equivalent to a 2.4-2.6 naturally aspirated displacement engine. With this "45TFSI" designation, you can't know exactly its actual displacement, but in fact it is roughly equivalent to between 2.4 and 2.6.

The industry will use various parameters to compare the previous generation or even the previous generation of processes, such as the so-called 3nm, which is compared to 7nm and 14nm, its frequency increases, the area shrinks, the power consumption decreases, the density increases, and the performance increases, so please remember that 3nm is not the actual characteristic size of the transistor.

Liu Xingliang: Now there are 7nm, 5nm, 3nm, so will there be 1nm in the future, and how will it develop in the future?

Chen Qi: The industry is already pursuing technology less than 2nm, and in Angstrom (symbol A), 1A is equal to 0.1nm, so the following values can be converted to nm: 20A is equivalent to 2nm, 18A is equivalent to 1.8nm, 16A is equivalent to 1.6nm, and so on.

ICInsight provides a roadmap for volume production at major foundry process nodes

There is an institution called EMAC in Europe that is developing about 1nm technology, which is more purely scientific in nature, and it is unknown when it will come out.

At present, the size observed by us humans on integrated circuit processes is limited to 1nm. For smaller sizes, the material may need to be changed, and there may also be a new nomenclature.

Liu Xingliang: TSMC 3nm is divided into N3B and N3E, what is the division on this name?

Chen Qi: It is similar to different models on the car, such as sport, comfort, standard, etc., such as N3B, N3E, N3X, N3P, etc. are all based on the same technology platform.

However, different customers have different needs. Some customers require high performance, such as high performance for the CPU used for the server; Some customers focus on low power consumption, such as CPUs for mobile phones that need to control heat dissipation. Others focus on cost savings, so there will be multiple sub-versions such as N3B, N3E, N3X, etc. on the same technology platform.

TSMC process node roadmap

Liu Xingliang: Apple A17 uses TSMC's 3nm technology, its transistor density has reached 19 billion, then I want to ask Samsung including some other foundries, what level are they now?

Chen Qi: The current two companies are TSMC and Samsung, and Intel is catching up. Although Intel has also proposed an IDM 2.0 strategy to transform into a foundry business, this plan is still in its early stages.

At the 3nm node, the transistor structure mainly includes two types, which can be regarded as two different technical routes. TSMC is still using FinFET (FinFET (FinFET) technology, while Samsung abandoned the FinFET structure in the 5nm stage and adopted the all-surround gate transistor technology developed by IBM, that is, GAA (Gate-All-Around) technology. In terms of GAA technology, Samsung also has an improved version called MBCFET.

Comparison of stereograms and profiles of Planar, FinFET and MACFET architectures

At present, from the perspective of process complexity, Samsung is probably one or two versions ahead of TSMC.

However, TSMC, as one of the world's most powerful foundries, has performed well in terms of manufacturing level and yield. Therefore, although Samsung uses a more advanced architecture, there is still a certain degree of gap between the manufacturing level and yield rate and TSMC.

Liu Xingliang: What is the difference between FinFET and MBCFET architectures?

Chen Qi: There is a significant difference between the two, which is caused by the structure of the transistor. GAA technology and MBCFET technology were developed because people learned that FinFET technology is approaching its limits.

GAA technology is suitable for certain structures, enabling higher density and reducing leakage. In addition, it has better electrostatic characteristics from a performance point of view. GAA technology is very advantageous for control channels, with enhanced voltage control capabilities, which can be further reduced.

In the future, when we involve 2nm technology, GAA technology will become mainstream, although Samsung is a little earlier than TSMC in this regard, and the results of the current implementation are still average. As the industry's process nodes reach 1.8nm, 1.6nm or lower nm, manufacturers will compete with each other on the same structure, which will involve competition in comprehensive capabilities such as supply capacity, cost, capacity and service to customers.

02

Samsung VS TSMC: Overtaking in corners and defensive counterattack

Liu Xingliang: In the past few years, TSMC has always been the popular fried chicken of wafer foundry, the top companies in the industry are looking for TSMC foundry, and Samsung has lost a large number of customers, including Apple and Qualcomm, what is the reason why Samsung has become an outcast?

Chen Qi: Since its establishment in 1987, TSMC has been focusing on the foundry market. Through a series of sales consolidations, it became the undisputed leader in the foundry industry around 2000 and has remained so ever since. Looking back over the past 20 years, TSMC has accumulated a wealth of experience that has made it an industry leader in all aspects of the foundry field, which is undeniable.

Samsung was also in the foundry business before, but it was essentially a company focused on memory devices, and by 2018, Samsung spun off its foundry division to form a separate subsidiary called LSI and operate as a separate asset.

Compared with TSMC, which was established in 1987 and has been operating for more than 30 years, Samsung has a big gap in terms of heritage. In addition, Samsung initially focused on the memory device process, and although the memory device process is also advanced, there are still some differences between the memory device process and the process of TSMC's logic customers (digital circuit customers).

Apple A4 compared to Samsung's S5PC110A01 processor DieShot, the former is highly customized based on the latter

I still remember buying the iPhone 6s phone, there were two versions, Samsung and TSMC, but which version to buy depends on luck. From a technical point of view, Samsung's 14nm process was slightly deficient compared to TSMC's 16nm process, and there was a gap of about 5% to 10% between the power consumption of the two versions of the iPhone, in other words, the Samsung version was more power-consuming.

Of course, Samsung has not completely given up cooperation with Qualcomm, Nvidia and other companies. Samsung has also undertaken some foundry orders in the manufacture of some 12nm chips. First of all, because TSMC's production capacity is limited, some customers have turned to cooperate with Samsung; Second, in addition to Apple, customers such as also want to cultivate spare tire suppliers. Otherwise, when TSMC keeps raising prices, they can't afford it and want to find a third party to reduce costs.

Therefore, some customers will intentionally or unintentionally give Samsung some orders to help him improve his level and see if he can further develop. So there is a delicate business relationship between Samsung, TSMC and some of their big customers. They don't want Samsung to do too well or too badly.

TSMC wants to always surpass Samsung technologically, while Samsung wants to snatch back some customers, which is a very delicate relationship.

Liu Xingliang: Why did Apple hang itself from a tree at TSMC, originally he also had two boats?

Chen Qi: Customers usually maintain a certain inertia when choosing partners, which we call Semiconductor Design Process Manufacturing Integration (DTCO).

As a customer, we pay attention to actual results, performance, yield and cost in all aspects, and TSMC is willing to invest a lot of money in research and development to respond to the integration needs of customers. In general, this relationship is difficult to leverage, and the quotation is only one of the considerations, but definitely not the only consideration, the customer will consider it all.

As mentioned earlier, you may be 5% cheaper than TSMC, but if your product experience is so poor that I can't sell my phone, then why should I save 5% on cost?

TSMC CEO Wei Zhejia and Apple CEO Cook

Apple's strategy will bring benchmarking effect to other customers, avoiding becoming a guinea pig with Samsung to test the new process, which will bring risks.

In addition, compared to TSMC, Samsung may have differences in customer groups, and the number gap is also huge. TSMC offers a variety of processes, from mature 12-inch processes to the most advanced 30nm and 5nm processes, while Samsung only focuses on the middle and cutting-edge parts, only providing advanced processes below 20nm.

Liu Xingliang: Is it possible that the inertia of customers and enterprises will make TSMC eat more and run, and make Samsung thinner and thinner?

Chen Qi: Generally speaking, the chip industry is basically winner-take-all, so observing TSMC's overall revenue, it has always been the first in the industry, and maintained a market share of about 50%-60%, until after 2018, Samsung was born, has undertaken orders from Apple, Nvidia, and Qualcomm, and now it is about 15%-18% share.

In addition, Samsung's share comes from UMC, GLOBALFOUNDRIES, and especially GLOBALFOUNDRIES, which has fallen from 10% to less than 10%. This is obviously the eldest and the second to fight, and the third suffers.

This thing is very common, often in the semiconductor industry or the second old, the third competition will marginalize the boss. In short, the two industry giants are competing, and if you don't follow up, your market share will be "eaten".

Liu Xingliang: We also see that Samsung is not willing, he has already bet heavily on 3nm, and took the lead in announcing the mass production of 3nm GAA process. NVIDIA is also testing this process with Samsung, if Samsung wants to grab customers back from TSMC, where is the key point from Samsung's point of view?

Chen Qi: Although Samsung is full of confidence to compete with TSMC on the 3nm process, according to my actual observation in the industry, the first aspect is yield, which is the lifeline for foundries, because customers and foundries will sign a guarantee on yield, for customers, yield is the cost, but also the cost of their competition with competitors.

For example, if I have 100 chips, 99 of them are usable and only one is scrap. If I choose to go to another foundry and there, where only 90 out of 100 chips are available, then I lose ten chips. For a company, these ten chips could be a profit, or it could be the key to survival.

On the yield issue, there is a gap between Samsung and TSMC, and before completely solving this problem, Samsung is not good to challenge TSMC, which depends on Samsung's ability to control the process, improve yield through huge investment, and obtain industry benchmark customers, which is the key to Samsung overtaking in corners.

The second aspect is the whole ecosystem. Compared with Samsung, the ecosystem around TSMC is larger. Whether it is wiring, simulation, or tape-out, there are a large number of third-party companies that can be outsourced, so customers only need to focus on what they are good at, and other links can be solved by paying for them. But Samsung, I haven't heard of a large third-party service company that can provide a package of services from back-end to verification, wiring design, simulation and tape-out.

Liu Xingliang: If these orders can be transferred to Samsung, and then from the perspective of TSMC or Apple, Qualcomm and customers, what are the possible reasons?

Chen Qi: First of all, it may be because of the new transistor process of MBCFET, which is the first process developed by Samsung, and TSMC does not have it at present. It can control yield and cost, and if companies like Qualcomm, NVIDIA, AMD, etc. think that it is reliable and feasible to choose Samsung tape-ins based on commercial cost considerations, then I think there is still greater feasibility in this regard.

The second point is about Samsung's main business is the storage field, if the use of advanced tooling technology, some high-performance chips (such as CPU, GPU or AI inference chips) combined with HBM (high-bandwidth memory), the efficiency is thousands of times higher, Samsung has self-developed HDM technology, if Samsung can lay a solid foundation in this field, it is also possible to attract customers, but there are also difficulties in this regard, for companies like TSMC also perform well in the field of advanced packaging.

Liu Xingliang: Samsung and TSMC feel a breath less than each other, what is the difference? In addition, is it possible for Samsung to surpass TSMC? How likely is it?

Qi: Yes, but not much, for example, as I mentioned earlier, if Samsung can provide more services, such as HBM memory in memory, can it work directly with customers, or is there a better packaging process that can be provided to customers for packaging? This provides more added value to the customer. On the other hand, there are supply levels and yield issues.

Liu Xingliang: There is a very famous Moore's Law in the chip industry, transistor performance is about doubled every 18 months or so, the price has dropped to half, but now from 5nm to 3nm performance has gone up, but the yield has declined, is the cost also rising?

Qi: That's very correct, so now there's a new concept called the post-Moore era.

Liu Xingliang: Does this mean that Moore's Law is invalid?

Chen Qi: From the perspective of the traditional integrated circuit process, it is indeed ineffective, because it is no longer doubling the performance every 18 months. Moore's Law originally stated that the number of transistors doubled every 18 months, but the price remained the same, or the price of copper transistors was halved.

After the 28nm process, the correspondence between performance and cost has been broken. Decades ago, the industry began to talk about the day when costs would not fall and go up, which is actually the moment when the last rule of Moore's Law is broken.

So, the industry came up with the concept of the post-Moore era and believed that development would be divided into two directions.

The first direction is aimed at customers who have a demand, that is, those who are engaged in digital circuits, advanced logic design, who continue to pursue high performance. As I mentioned earlier, they wanted to cram a large number of transistors into a square millimeter chip area, using advanced digital processes; The second direction is diversification, which means integrating different kinds of processors (such as CPUs, GPUs, DPUs, etc.) into a heterogeneous architecture chip, and then packaging them using advanced packaging technology.

We call this scheme Beyond Moore, the post-Moore era.

03

Qualcomm, NVIDIA, MediaTek, who gets in the car first?

Liu Xingliang: From 5nm to this iteration of 3nm. What are the benefits of simple digital changes for customers, including users?

Chen Qi: Two dimensions can answer this question, the first is the change of numbers, from 5 to 3, indicating the change of integrated circuit process.

Each generation of integrated circuit processes has improved in various aspects compared to the previous generation, including but not limited to improved performance and increased transistor density. At the same power consumption, the speed can be faster; At the same performance, power consumption can be reduced.

In the field of integrated circuits, I want to popularize a little knowledge from you, that is, the core logic in the integrated circuit process, called PPA, represents three English letters, namely performance, power consumption, and area. Everyone likes to have a new process, compared with the previous generation of processes, hope that the performance will be improved, the power consumption will be reduced, the area will be reduced, so that the overall cost will be lower, which is also the goal that Moore's Law of integrated circuits has been pursuing, and this pursuit has continued to this day.

Not every customer needs absolute low power consumption or high performance, we usually use mobile phone testing as a guideline, for example, in the TSMC N3 process, some customers pursue a low-power version of N3E. This version may reduce the heat generation of the phone, thereby improving the battery life, which is a more practical consideration. For customers who need high-performance computing, the focus is on improving floating-point computing capabilities.

Assuming that in the 5nm process, the original business requires 100 chips to achieve the target computing power, then in the 3nm process, only 40 chips may be needed to achieve the same computing power. All things considered, it is more cost-effective for these customers to use the 3nm process.

The performance, area, and power consumption of each generation of the process are constantly changing, and these changes are reflected in the customer terminal, either in terms of improved performance, reduced power consumption, or increased overall capability. From the design company's point of view, adopting new processes gives them more room for the platform to play and also benefits direct customers.

Liu Xingliang: Can you roughly calculate whether the cost from 5nm to 3nm will go down or up? How much does it cost to produce a 3nm and 5nm chip?

Chen Qi: This is also a trade secret between each customer and TSMC, and we can only guess the approximate manufacturing cost.

Manufacturing costs At present, about 5nm to 3nm tape-out costs account for about 30%-40%, 3nm a wafer is about 22,000-24,000 US dollars of foundry fees, how many chips on it, you can calculate the cost of a single chip. In contrast, this is only the smallest part, and the largest proportion is IP and Mask tools and various licenses, which are very expensive.

Mask is masking template, because the density, number and performance of transistors is closely related to the number of layers of the mask, if 50, 60 or 80 lithography operations are required, then a corresponding number of mask equipment will be required, and the cost is up to tens of millions of dollars a set.

In addition, creating a code during the tape-out process, in addition to the technology, tools and assets that come with it, there are many TECD tools, which also need to be paid. Another part of the cost is IP development costs, or take TSMC as an example, they spent tens of billions of dollars to develop the 3nm process, of which the copyright fee reached hundreds of millions of dollars.

So when you add up the cost of manufacturing a chip, it's estimated to be between $300 million and $400 million. Globally, only a handful of customers can afford to make such chips, just five of them.

Liu Xingliang: So far, TSMC has basically identified 3nm customers, and what specific products do they correspond to? Can you estimate how big the current market size of 3nm chips is?

Chen Qi: Because the cost is too high, not every company in the world can afford such chips.

For some companies, they may invest a lot of money, such as large companies such as Nvidia, AMD and Qualcomm, as well as companies such as Tesla engaged in FSD self-driving technology, need to use such chips.

Because the investment needs to be recovered from the cost of the product, if it cannot be recovered, it is a loss for the design customer. As a result, many companies are very cautious about introducing advanced processes. The size of this market may not be too large, but it is attractive due to the high single-chip gross margin of the chip.

It is estimated that TSMC is expected to achieve billions of dollars in revenue if it can fully utilize its production capacity, equivalent to between 5% and 10% of the entire market.

Liu Xingliang: At present, there are TSMC and Samsung, Intel is also preparing now, Samsung is working so hard to catch up with TSMC, does Intel have a chance?

Chen: Intel's 2.0 plan is a new strategy proposed after the previous CEO took office. The plan aims to integrate various departments, and one of the important directions is contract manufacturing.

In order to start the foundry business, Intel also previously acquired the Israeli company Gaota Tower. However, for specific reasons, the transaction did not materialize.

In my opinion, Intel may not do well in terms of foundry. Technically, Intel should have no problem. Although Intel is often referred to as a "toothpaste factory", in terms of process level, Intel has so far put some pressure on TSMC. Its problem is the lack of foundry philosophy and culture. Fundamentally, it doesn't have the DNA to support its foundry business.

Not long ago, Yang Guanglei, former director of TSMC's research and development department, made a comment after visiting Intel. At first, he thought Intel had a 20 percent chance of success, but after looking at Intel, he thought the probability of success was only 1 percent.

Liu Xingliang: How long do you think it will take? Can our 3nm be popularized in this market?

Chen Qi: Look at the next few major customers, mainly NVIDIA, AMD and Qualcomm, because they are relatively certain and are likely to be adopted in the next year or two. As long as one competitor uses a certain chip, other competitors will follow.

Apple has made a breakthrough this year, using 3nm technology chips, MediaTek may see the situation to follow, such major customers and potential customers have real demand for 3nm chips. As long as competitors adopt it, they will naturally follow suit, and will be forced to use by the market, because if they are not used, performance and power consumption cannot compete with competitors, and there is no other way to choose.