Pursuing the path of Moore's Law, Intel unveiled fundamental breakthroughs in key packaging, transistors, and quantum physics, propelling and accelerating computing into the next decade. The recent IEEE International Electron Devices Meeting (IEDM) 2021, Intel Outline discussed the use of hybrid bonding technology, the packaging increased by more than 10 times the interconnect density, transistor shrinkage to complete 30% to 50% area improvement, new power and new memory technology major breakthroughs, and at some point in the future will completely subvert the new concept of computing.
Intel pointed out that continuous innovation is the cornerstone of Moore's Law, and the Component Research Business Group is committed to innovating across three key areas, providing more transistor-necessary micro-technology, improving the new silicon capabilities of power and memory, and exploring new physical concepts to revolutionize the way the world operates. Through component research, many innovations break the barriers of Moore's Law and are actually applied to products - strain silicon, Hi-K metal gate, FinFET, RibbonFET, and encapsulation innovations such as EMIB and Foveros Direct.
Intel's breakthrough in IEDM 2021 is expected to continue to promote the advantages of Moore's Law after 2025 with the following three areas;
First, Intel pursues important research into basic microfilm technologies that can provide more transistors in future products:
The company's researchers proposed solution outlines for the design, process, and assembly challenges of hybrid bonded interconnects, expecting more than 10 times better interconnect density improvements in packaging. At Intel Accelerated in July, Intel announced the introduction of the Coveros Direct program, which completes the bump pitch below 10 microns, providing an order of magnitude interconnect density increase for 3D packages. To enable the ecosystem to benefit from advanced packaging, Intel is also calling for the creation of new industry standards and test procedures that enable a hybrid-bonded chiplet ecosystem.
In addition, it is expected that the gate-all-around RibbonFET, Intel is stacking multiple (CMOS) transistors, mastering the upcoming post-FinFET era, by putting more transistors per square millimeter, completing up to 30% to 50% logic scaling improvement, and continuing to push Moore's Law.
Intel also uses forward-looking research to build a path forward for the angstrom era for Moore's Law. Show how new materials with only a few atom thicknesses can be made to overcome the limitations of traditional silicon channels, adding millions of transistors per chip area, and providing more powerful computing power for the next decade.
Second, Intel brings new features to silicon:
The key point is the 300mm (12-inch) chip, which completes the world's first integrated gallium nitride (GaN)-based power switch and silicon-based CMOS, driving more efficient power technology, providing low-loss, high-speed power supply to the CPU, while reducing motherboard components and space. Another advance is Intel's use of new ferroelectric materials to complete industry-leading, low-latency read and write capabilities, and potentially become next-generation embedded DRAM technology, providing more memory resources to solve increasingly complex problems in computing applications from games to AI.
Finally, Intel is looking for the power of quantum computing based on crystalline silicon tubes, as well as new switches that run with new room-temperature devices and have huge amounts of energy-efficient computing. The future unveiling of entirely new physical concepts could replace traditional MOSFETs:
IEDM 2021 Intel showcases the world's first experimental magnetoelectric spin-orbit (MESO) logic device running at room temperature, demonstrating the manufacturing potential of new transistors based on switching nanoscale magnets. Intel and IMEC are making progress in spin electronic materials research, taking device integration research one step further towards full-featured spin-torque devices. Intel also exhibited a complete 300mm qubit process process that is compatible with CMOS raw manufacturing and enables scalable quantum computing to determine the next step in the research.
(Image source: Intel)