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AMD Zen4 Xiaolong spy photo first exposed: 96 core, 12 channels DDR5

AMD has just previewed some details of the Zen4 architecture, and the material has come, and the next generation of Dragon processors of the Zen4 architecture has been exposed.

AMD will launch the Ryzen™7000 series desktop processor based on Zen4 architecture in the second half of this year, TSMC 5nm process manufacturing, AM5 LGA1718 package interface, support DDR5 memory, PCIe 5.0 channels.

It is reported that the Ryzen™ 7000 series will also use a large and small core architecture, each CCD module has 8 full Zen4 cores, 8 down-frequency Zen4 cores, each pair shares 1MB L2 cache, and all cores share 32MB V-Cache L3 cache.

AMD Zen4 Xiaolong spy photo first exposed: 96 core, 12 channels DDR5

Of course, the Zen4 architecture will also enter the data center, that is, the Xiaolong 7004 series, codenamed Genoa, up to 96 cores, support 12 channels DDR5, 128 PCIe 5.0, and mass production in the second half of this year.

There is also a derivative version of Zen4c, codenamed Bergamo, with a maximum of 128 cores, to be launched in the first half of next year.

Zen4 Dragon will also switch to the new interface, SP5, also known as LGA6096.

On the physical photo of this exposure, the word SP5 is printed on the fixed bracket, and the processor surface already has numbered information, which has obviously entered the engineering sample stage, which is fast enough.

However, it is also said that this is only a prototype, can not actually run, only for the OEM manufacturers' next-generation motherboard design.

AMD Zen4 Xiaolong spy photo first exposed: 96 core, 12 channels DDR5

The future Zen5 architecture, code-named Turin, is said to achieve up to 256 cores and continue to support 12-channel DDR5.

AMD Zen4 Xiaolong spy photo first exposed: 96 core, 12 channels DDR5

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