Not meeting the development speed of PCI-SIG for open industry I/O interface standards, ten industry giants including ASE, AMD, ARM, Google Cloud, Intel, Meta (Facebook), Microsoft, Qualcomm, Samsung, and TSMC jointly announced the establishment of industry alliances to jointly create small chip interconnect standards.
The full name of the UCIe standard created by the ten giants is "Universal Chiplet Interconnect Express" (universal small chip interconnect channel), which establishes a unified standard for interconnection at the chip packaging level.
The UCIe 1.0 standard defines the inter-chip I/O physical layer, inter-chip protocol, software stack, etc., and utilizes two mature high-speed interconnection standards of PCIe and CXL.
Why are these vendors organizing alliances to introduce new interface standards? Because chip giants have found that while they want to promote advanced processes, it is indispensable to develop new packaging technologies, especially the integration of multiple small chips with different processes and different functions through various ways such as 2D, 2.5D, 3D, etc., in order to make large chips more flexible.
In the past, small chip packaging was the only one of the manufacturers, and now the UCIe organization is to solve the inter-chip interconnection, including different processes, different architectures, different functions of the chip mixing and matching, and even x86, ARM, RISC-V architecture integration is also a possibility, in order to adapt to the future rapid development of science and technology needs.