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Intel announces a new Xeon product roadmap

Intel's last update roadmap was last year.

But last July updated the process roadmap, specifically, the original 10ESF was renamed 7nm, the original 7nm was renamed 4nm, 7SF was renamed 3nm, and 5nmGAA was renamed 20A. At that time, it was also said that Intel 7 would be used for Alder Lake consumer processors and Sapphire Rapids data center processors, and the Alder Lake consumer processors have been officially launched, and on the server side, for the roadmap after Saphire Rapids, Intel did not give an exact arrangement at that time.

However, at the recent 2022 Investor Conference, Intel disclosed for the first time the new Intel Xeon product roadmap for 2022-2024. Intel will not only add a family of ultra-energy-efficient processors code-named Sierra Forest to the data center product line to elevate key products to more advanced process processes, but also develop a newer and more comprehensive architectural strategy for the data center, thereby further enhancing Intel's overall leadership in the industry while driving its continued growth in the cloud, network, and edge with new next-generation products.

Sandra Rivera, Executive Vice President and General Manager of Intel's Data Center and Artificial Intelligence Group, said, "Today, we clearly demonstrated the industry-leading Intel Xeon product roadmap that will continue to drive our growth in 2024 and beyond and enhance Intel's leadership in the industry across the board. Based on the diverse needs and time planning of our customers, we have worked with our customers to create a rich product portfolio, which will also drive further innovation through our customers' developer ecosystems. ”

Intel announces a new Xeon product roadmap

New architecture and leading product roadmap

For future generations of Xeon processors, Intel has developed a new architectural strategy — a dual-track product roadmap based on both the P-core and the Energy Efficiency Core to integrate the two optimized platforms into a common, industry-defining platform. This new architecture strategy will maximize the performance per watt and segmentation capabilities of the product, thereby comprehensively enhancing Intel's overall competitiveness in the industry. As it adopts a new strategy, Intel has further enhanced its compatibility with the existing broad Xeon platform ecosystem to deliver better return on investment for users.

Sapphire Rapids: For the performance core series manufactured using the Intel 7 process process, Intel mainly shared around Sapphire Rapids. Sapphire Rapids is Intel's most feature-rich Xeon processor to date, enhancing its leadership in several key data center areas such as artificial intelligence and security. In March, Intel will begin gradually shipping Sapphire Rapids processors and lead the industry's transition to next-generation memory and interface standards with standards technologies for DDR5, PCIe 5.0, and the new Compute Express Link high-speed interconnect.

Specifically, sapphire Rapids is a blocked, modular SoC architecture that uses Intel's embedded multi-chip interconnect bridging (EMIB) packaging technology to support accelerator interface architecture instruction sets, advanced matrix extensions, and data flow accelerators to provide higher overall workload performance.

Sapphire Rapids' black technology doesn't stop there, we've seen its unlimited potential in AI on third-generation Xeon Scalable processors, while Sapphire Rapids goes a step further and provides significant acceleration for Tensor processing at the core of deep learning algorithms by integrating Intel Advanced Matrix Extensions AMX acceleration IP modules. Specifically, Sapphire Rapids can perform 2,000 INT 8 and 1,000 BFP 16 operations per cycle, achieving a considerable energy efficiency improvement over the AVX-512 instruction set, which can greatly improve training and inference performance in AI workloads.

In addition, Sapphire Rapids integrates intel accelerator interface architecture instruction set AIA, which enables efficient scheduling, synchronization, and signaling of accelerators and devices, while Intel Stream Accelerator DSA offloads the most common data movement tasks, improves the handling of these overhead tasks to provide higher overall workload performance, and can move data between CPU, memory, and cache, as well as all attached memory, storage, and network devices.

Emerald Rapids: Intel will deliver Emerald Rapids, a next-generation performance core processor manufactured on Intel's 7-process process, in 2023. The processor's socket will be compatible with Sapphire Rapids and enhance the memory and security benefits of existing platforms while enhancing performance, providing Intel customers with easy-to-use and valuable upgrades.

Sierra Forest: As an important part of this new strategy, Intel disclosed the details of Sierra Forest for the first time. This is a new Xeon processor based on energy-efficient cores in data centers that will deliver extremely high performance per watt and ultra-high density while dramatically reducing total cost of ownership. Scheduled for 2024, the product will feature a solution built with a core optimized for cloud workloads and designed to meet the needs of Intel's hyperscale customers.

Granite Rapids: Based on confidence in the Intel 3 process, Intel announced that it will upgrade the manufacturing process of the Granite Rapids processor from Intel 4 to Intel 3. This next-generation Xeon processor based on performance cores is scheduled to be available in 2024 and will further strengthen Intel's overall leadership in the industry.

Intel announces a new Xeon product roadmap

The 3rd generation of Intel Xeon Scalable processors is gaining momentum

While demonstrating future innovations with a new data center product roadmap, Intel also highlighted the current momentum of the 3rd generation Intel Xeon Scalable processor (Ice Lake), which is optimized for modern workloads. Intel has shipped nearly 2 million third-generation Intel Xeon Scalable processors to customers worldwide, with shipments exceeding 1 million in the fourth quarter of 2021 alone. In addition, the total shipments of Intel Xeon processors in December 2021 exceeded the total shipments of server CPUs by similar manufacturers in the industry in 2021.

The key technical highlights of the 3rd Generation Xeon Scalable processors are the SGX Intel Software Shield Extensions technology and AI acceleration capabilities. Compared to conventional privacy protection or security technologies, SGX has significant advantages in terms of security, performance and usability. In terms of security, it is a hardware-level security technology, based on the trust in the CPU, can effectively avoid the security risks caused by the previous dependence on high-privilege software; performance, on the third generation of Xeon Scalable processor platform, SGX's computing performance is excellent, can effectively control costs; availability, SGX's ecological use of LibOS (library operating system), is committed to avoid breaking the existing application mode, can greatly reduce the cost of rebuilding some communication or the underlying architecture. This makes it easier to load and protect data and models. To the maximum extent, it helps developers to seamlessly migrate the entire data application, unlike secure multi-party computing and homomorphic encryption or differential privacy, which has some obvious performance or accuracy issues.

By introducing the AVX-512's register arrangement combination, the third generation of Intel Xeon Scalable processors can achieve integer-based fusion multiplication and addition operation, and then through VPMADD52 instructions and multi-cache parallel operation mechanism, RSA 2048 can achieve a 5.6-fold improvement over the previous generation CPU. In addition, there are new instruction sets in symmetric encryption, Galahua domain, hashing, etc., and through the implementation of the instruction set architecture, as well as multi-cache parallel execution and function stitching technology, a large amount of cryptographic operation hardware acceleration is finally realized.

In terms of AI acceleration, taking 3D face modeling, which is now popular among game manufacturers, as an example, the VNNI instruction set on Intel Ice-Lake is used to achieve image mapping from face photos to 3D models on int8. Through an FP32 to int8 conversion, a 4.23 times performance improvement can be achieved; in terms of natural language processing, Intel has also optimized a model of Transformer with Alibaba Cloud, and achieved a 3x performance improvement through VNNI int8.

At present, the mainstream open source frameworks on the market, such as TensorFlow, PyTorch, MXNet, including Intel's open source advocacy of Analytics Zoo, are optimized on Intel's DLBoost instruction set, and naturally have also received corresponding performance improvements, and because of this, the third generation Xeon Scalable processor can use in-depth learning image and video applications, or NLP, recommendation systems and other application scenarios, with targeted use of int8, The FP32 or BF16 instruction set is accelerated and flexibly implemented according to software needs and code.

It is not difficult to see from Intel's strategic changes in recent years that Intel has long begun the journey from CPU to XPU, filling intel's gap in the GPU through the Xe architecture, thus taking the last important piece of the puzzle in heterogeneous computing. At the same time, with the steady progress of IDM 2.0, Intel has more choices in design, manufacturing, packaging, test integration, and IDM, which can quickly promote product processes and expand ecological cooperation.

The next decade will be the golden decade of computing architecture. In this regard, many companies in the industry have also deployed for multi-computing architecture, and the new Intel Xeon product roadmap all highlights its depth and breadth in software, chips and platforms, technologies in packaging and process processes, and strength in large-scale manufacturing, all of which show that Intel has prepared for the digital era of thousands of times the growth of computing power.

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