According to TSMC's latest annual report, in 2021, TSMC will produce 12,302 different products for 535 customers. Its application scope covers the entire electronic application industry, including personal computers and their peripheral products, information application products, wired and wireless communication system products, high-performance computing servers and data centers, automotive and industrial equipment, as well as consumer electronics including digital televisions, game consoles, digital cameras and other consumer electronics, artificial intelligence Internet of Things and wearable devices, and many other products and applications.
Being able to achieve such achievements has an important relationship with the company's continuous investment in technology. According to TSMC, the company's total R&D expenditure accounted for 7.9% of revenue last year, which is equivalent to or exceeds the size of many other high-tech leading companies. This has also helped the company to lay out in multiple areas. As can be seen from the financial report, in addition to the development of complementary metal oxide semiconductor (CMOS) logic technology, TSMC has extensively developed other semiconductor technologies to provide customers with the functions required for mobile system single chip (SoC) and other applications.
Specifically, the technologies that TSMC will complete in 2021 include the following:
1. Through the verification of the fifth generation (Gen-5) CoWoS, the silicon intermediation layer area is as high as 2,500 square millimeters, which can accommodate at least two system monocrystalline logic chips and eight high-frequency wide memory (HBM) chip stacks;
2. Successfully verified the 7th generation of integrated fan-out laminated packaging technology (InFO-PoP), which can support mobile applications with enhanced heat dissipation;
3. Started the production of the third generation of integrated fan-out and substrate packaging technology (InFO-oS Gen-3), providing more chip segmentation and integration, with larger package size and higher bandwidth;
4. Expand the combination of 12-inch BCD technology for 90nm, 55nm, 40nm and 22nm technologies to support a variety of rapidly growing mobile power management chip applications with different levels of integration;
5. Maintain the stable high yield of 28nm embedded flash memory and achieve technical verification, support the application of consumer electronics and first-class automotive electronics technology;
6. 40nm resistive random access memory (RRAM) goes into mass production, and 28nm and 22nm are ready for mass production as a low-cost solution for the price-sensitive IoT market;
7. Increase the productivity of 22 nanometer magnetic random access memory (MRAM) and complete technical verification in 2021 to support the next generation of embedded memory MCUs, automotive electronic components, Internet of Things, and artificial intelligence applications;
8. Achieve a 13% pixel size reduction in the structure of the Quad Phase Detection (QPD) CMOS sensor to support the mobile imaging market.
As of 2021, the process technologies that TSMC has developed or offered include:
Logic process technology
The development of the 3-nano Fin Field-Effect Transistor (FinFET) (N3) technology is on schedule and is well underway, with mass production expected to begin in the second half of 2022.
N3 Enhanced (N3E) technology is an enhanced version of N3 technology, and the technology development is carried out according to plan and has made good progress. N3E technology will continue to provide industry-leading advantages for mobile communication and high-performance computing applications, and the mass production time is expected to take place one year after the N3 mass production.
The 4nm FinFET (N4) technology is an enhanced version of the 5nm FinFET (N5) technology, which has been trial-produced for customers in 2021 and is expected to be mass-produced in 2022.
The development of the 4nm FinFET Plus (N4P) technology is on schedule and is progressing well, with trial production expected in 2022.
N4X Process Technology is available in 2021. This technology is tailor-made by TSMC for high-performance computing products, and in TSMC's 5nm series process technology, it shows extreme performance and the highest operating timing, and is expected to be trial production in the first half of 2023.
The 5nm FinFET Intensive Edition (N5P) technology is a enhanced version of the N5 technology, which has been mass-produced in 2021.
6nm FinFET (N6) technology will be mass-produced in 2020 and widely used in mobile phones, high-performance computing, and consumer electronics in 2021.
The 7nm FinFET (N7) and 7nm FinFET Powerful Edition (N7+) technologies have been mass-producing 5G and high-performance computing products for customers for many years, and will start mass production of consumer electronics and automotive products for customers in 2021.
The 12nm FinFET Compact Plus (12FFC+) technology was mass-produced in the first quarter of 2021.
Based on the 12FFC+ technology and the N12eTM technology of the silicon intelligence ecosystem, a new Extreme High Threshold Voltage (eHVT) with very low leakage will be introduced in 2021.
22nm Ultra-Low Leakage (ULL) technology will introduce a new enhanced version of low leakage and cost-effective components in 2021, further enhancing the 22ULL technology platform to support customers in a wider range of product applications.
Special process technology
The development of foundation-based silicon ip for 5nm vehicles is proceeding as planned and is progressing well, and is expected to pass AEC-Q100 Grade-2 validation in 2022.
N6 Radio Frequency (RF) (N6 RF) technology will be developed in 2021, and customer product roll-in is expected to begin in 2022.
16nm FinFET Compact (16FFC) RF technology received drop-in from multiple customers in 2021.
Mass production of 22ULL RF technology will begin in 2021 and will cover applications such as consumer electronics and automotive products.
22ULL Embedded RRAM Technology is TSMC's second-generation RRAM solution that balances cost and reliability. In 2021, multiple customers have already adopted this technology to complete product validation and prepare for production.
22ULL Embedded MRAM Technology Silicon Intelligence completed more than 1 million cycle operation durability and reflow soldering capabilities in 2021. This technology demonstrates automotive AEC-Q100 Grade-1 capabilities and has been mass-producing wearables for customers for many years.
The 28nm ULL Embedded Flash Memory Process (eFlash) has passed the AEC-Q100 Grade-1 reliability certification technology, completed safety product validation in 2021, and will be mass-produced for customers.
Silicon On Insulator (SOI) technology provides an industry-leading competitive advantage with 12-inch wafer 40-inch wafer insulation overlay technology, receiving multiple customer drop-offs in 2021 and volume production expected to begin in 2022.
The 12-inch 90nm dual carrier-complementary gold-oxygen semiconductor-diffusion metal oxide semiconductor powerful edition (Bipolar-CMOS-DMOS Plus, BCD Plus) technology will be validated in 2021. TSMC also assisted the customer in completing a new design finalization in the same year and began mass production using this technology.
The gallium Nitride on Silicon technology platform, the first generation of silicon substrates, will be further enhanced in 2021 to support customers' diverse market applications. The second generation of the gallium nitride technology platform for silicon substrates is under development and is expected to be completed in 2022.
Continue to improve the complementary CMOS Image Sensor (CIS) technology to meet the strong demand for advanced image sensors in smartphones. In 2021, TSMC will assist customers in bringing the world's smallest pictorial products to market.
TSMC successfully adopted Piezoelectric Micro Electro-mechanical Systems (MEMS) technology to assist customers in launching their first MICRO Electro-mechanical single-chip loudspeaker in 2021.
Specifically, TSMC's special technologies and application coverage are as follows:
(1) Mixed signal/RF
With the advent of the millimeter wave era of fifth-generation mobile communication technology (5G), TSMC has provided many competitive technology solutions that leverage RF Design-Technology Collaborative Optimization (DTCO). In 2021, TSMC will continue to provide 6nm RF technology to support 5G transceiver design, 40nm special process support for 5G RADIO front-end modules (FEMs) designed below 6GHz, and 28nm high-performance compact version (HPC+) process support for 5G mmWave FEM designs.
(2) Power SUPPLY IC/ Bipolar - Complementary Metal Oxide Semiconductor - Double Diffusion Metal Oxide Semiconductor (BCD)
In 2021, TSMC expanded its 12-inch BCD technology process portfolio to include 90nm, 55nm, 40nm, and 22nm to address fast-growing mobile power management chip applications, such as dedicated 5-volt power switches, to address the growing power consumption demands of lithium batteries. Mass production of 90nm BCD technology has been successfully introduced, supporting a wide range of applications from 5 volts to 35 volts, and mass production of 40nm BCD 20/24 volts technology has also begun, with ultra-low power reference and integrated variable resistance memory modules. The company will continue to develop 28-volt and 5-16 volt high-voltage components to cover more power management chip applications.
(3) MICRO-ELECTROMECHANICAL SYSTEM
In 2021, TSMC completed the validation of piezoelectric MEMS technology to produce MEMS loudspeakers with high sound quality and fast response. Future plans include the development of next-generation high-sensitivity piezo microphones, 12-inch wafer optical image stabilization (OIS) systems, single-chip ultrasonic sensors for medical use, and mechatronic applications for automotive.
(4) Gallium nitride semiconductor
In 2021, TSMC's first generation of 650-volt Gallium Nitride Enhanced High Electron Mobility Transistor (E-HEMT) was validated and entered full energy production, with more than 130 chargers launched in the market. The company continues to expand its production capacity to meet the needs of its customers. The quality factor (FOM) of the second generation 650 volts and 100 volts E-HEMT is 50% higher than that of the first generation, and production is expected to begin in 2022. The 100 volt gallium nitride high electron mobility transistor (D-HEMT) has completed component development and is expected to go into production in 2022. In addition, TSMC has also begun to develop a third-generation 650-volt enhanced high electron mobility transistor, which is expected to be launched in 2025.
(5) Complementary metal oxide semiconductor (CMOS) image sensor
In 2021, TSMC made several technological advances in complementary metal-oxide semiconductor image sensor technology, including:
(a) 13% reduction in pixel size on the new Quad Phase Detection (QPD) sensor structure to support the mobile image sensing market;
(b) Capacitance implements pixel embedded 3D high-density metal-dielectric-metal (MiM) on dual conversion gain and lateral overflow integrating capacitor image sensors to support high dynamic range mechanical vision and safety camera applications;
(c) Mass production of next-generation automotive image sensors with a dynamic range of 25 dB and a three-fold lower dark state current than previous generations, and the ability to be applied to autonomous driving assistance systems.
(6) Embedded flash memory/emerging memory
In 2921, TSMC achieved several important milestones in embedded non-volatile Memory (NVM) technology. In terms of 28nm processes, the development of embedded flash memory that supports high-performance mobile computing and high-performance low-leakage process platforms has maintained a stable high yield, and has passed the verification of consumer electronics and first-class automotive electronics, and is expected to complete the highest specification Level Zero automotive electronics technology and product verification by 2023. TSMC also offers resistive random access memory technology as a low-cost embedded non-volatile memory solution to support the price-sensitive IoT market. 40nm goes into mass production, while 28nm and 22nm are ready for mass production.
TSMC is also accomplishing several important achievements in embedded magnetic random access memory. The mass-produced 22nm MRAM has successfully increased production capacity by simplifying the integration process and completing technical verification in 2021. The 16nm process supporting automotive electronics applications also maintains a stable high yield and is expected to complete technical validation in 2023. At the same time, TSMC completed a feasibility assessment of multi-function magnetic random access memory to meet the customer's requirements for high speed and low power consumption in microcontroller (MCU), artificial intelligence, and virtual reality (VR) applications.
3DFabricTM: TSMC's advanced packaging technology
Chip on Wafer (CoW) technology in TSMC-SoICTM's 3D silicon stack process technology successfully demonstrated excellent electrical performance in 2021 on the static Random Access Memory (SRAM) and heterogeneous integration of logic chips in customer products.
CoWoS-S (Chip on wafer on substrate with silicon interposer) technology adds a choice of embedded deep groove capacitors in 2021 and expands the silicon substrate to triple the size of the reticle, and has been validated to help customers integrate more logic and High Bandwidth Memory in the use of high-performance computing products.
CoWoS-R (Chip on wafer on substrate with redistribution layer interposer) technology completed technical validation in 2021.
Fine-pitch array copper bump (C u bump) technology for N 4 wafer cladding packages successfully entered trial production in 2021. In 2021, TSMC is committed to maintaining strong partnerships with many world-class research institutions, including the SRC in the United States and IMEC in Belgium. The company also continues to expand its research collaborations with the world's top universities to achieve the two major goals of semiconductor technology advancement and nurturing future talents.
2021 research results
In the earnings report, TSMC also shared the company's research results in 2021. First of all, let's look at the process manufacturing aspect:
(1) 3-nanometer process technology
In 2021, TSMC will establish a platform to support N3 technology to support high-performance computing and system-on-chip applications, and also start trial production, and is expected to start mass production in the second half of 2022. TSMC has also begun to develop N3E technology, which has improved the permissible range of the production process, with better performance and power consumption, and is expected to be mass-produced one year after the mass production of the N3 process.
(2) 2-nanometer process technology
In 2021, TSMC enters the development phase of 2nm process technology, focusing on the design and implementation of test vehicles, the manufacture of reticles, and silicon trial production. The main advances are in improving the performance of basic process settings, transistors and wires.
(3) Micro shadow technology
In 2021, TSMC's R&D organization will support 3nm pilot production by improving wafer yields to achieve reliable imaging, and the company will also enhance the application of extreme ultraviolet light (EUV), reduce material defects and improve flattening capabilities to support the development of 2nm technology. In addition, TSMC's R&D units are committed to reducing EUV exposure machine mask defects and process stack errors, and reducing overall costs.
TSMC's EUV project has made continuous breakthroughs in power output and stability, further improving productivity, and further progress in EUV micro-shadow process control, photoresist material mask protective film, and reticle production quality, thereby improving yield to meet the requirements required for mass production. In the future, the Company will continue to study opportunities for the production and energy saving of next-generation products to support the EUV project to achieve its long-term goal of net zero emissions by 2050.
(4) Reticle technology
In 2021, R&D organizations will focus on improving the performance of the extreme ultraviolet reticle online wide control and reticle lamination accuracy to meet the requirements of the 3nm micro-shadow process. Through the basic development of 2nm reticle materials and reticle manufacturing processes, TSMC continues to refine its extreme UV reticle technology.
When it comes to the integration of wire and packaging technologies, TSMC has named the fine-pitch connection technology of the wafer-level chip-to-chip process 3DFabricTM, which includes integrated fan-out (InFO) that embeds the chip before interconnection, CoWoS that embeds the chip on the prefabricated line re-distribution layer (RDL), and SoIC that stacks the chip directly with the chip.
TSMC offers a family of General Purpose Wafer Level System Integration (WLSI) technologies, including SoIC, System-on-Wafer (SoW), and Integrated Substrate System (SoIS) to meet the needs of future computing system integration microcosmation. In 2021, the company also made the following progress.
1. Three-dimensional integrated circuit (3DIC) and system integration chip (TSMC-SoICTM)
System Integration Chip (TSMC-SoICTM) is an innovative wafer-level front-end three-dimensional integrated circuit (3DIC) chip stack platform with superior bonding density, interconnect bandwidth, power efficiency, and thin profile that perpetuates Moore's Law through system-level downsizing, with sustained performance gains and corresponding cost advantages. SIG can then be packaged using traditional packaging or TSMC's new 3DFabricTM technologies, such as CoWoS or integrated fan-out, to support the next generation of high-performance computing (HPC), artificial intelligence (AI) and mobile applications.
TSMC's Current SoIC process is expected to complete preliminary validation in the second half of 2022. TSMC will continue to pursue the micro-scaling of system integration chip technology in order to align with TSMC's advanced silicon technology, further improving transistor density, system PPA (power consumption, performance and area), and cost advantages.
2. Chip-Last CoWoS
CoWoS with silicon interlayer is a 2.5D leading technology for high-end high-performance computing and artificial intelligence product applications. The silicon interposer of this technology has sub-micron-sized wire-wound layers and integrated capacitors (iCaps), so various small chips such as system single chip (SoC) and high-frequency wide memory (HBM) can be placed on it. The fifth-generation CoWoS, with a silicon interlayer area of up to 2,500 square millimeters and can accommodate at least two SoC logic chips and eight HBM stacks, was validated in 2021. In 2022, TSMC's main focus will be to complete the verification of the new third-generation HBM on CoWoS technology.
3. Chip-First integrated fan-out (InFO)
In 2021, TSMC will continue to lead the industry in mass production of the sixth generation of integrated fan-out lamination technology (InFO-PoP Gen-6) to support mobile applications, and the third generation of integrated fan-out and substrate packaging technology (InFO-oS Gen-3) to support HPC die segmentation applications. The seventh generation of InFO-PoP has also been successfully validated to support mobile applications and enhance thermal performance. The fourth generation of Info-oS was developed on schedule and will provide more chip segmentation, integrating larger package sizes and higher bandwidths.
4. Advanced wire technology
By achieving leading technology, TSMC's advanced wire technology continues to help customers strengthen their competitiveness In 2021, the development of new materials has achieved a reduction in wire resistance and capacitance to improve chip efficiency. In addition, the introduction of innovative wire signal routing and power consumption designs can improve chip performance while reducing costs.
Advanced technology being studied
Innovations in components and materials continue to improve the efficiency of advanced logic technologies and reduce power consumption. In 2021, TSMC partnered with two leading universities to successfully demonstrate a record low contact resistance between a two-dimensional transition metal disulfide compound of a semi-metallic bismuth (Bi) and a semiconductor, achieving the highest on-state current density of a single-atom layer molybdenum disulfide two-dimensional transistor.
In May 2021, the breakthrough was published in Nature, one of the world's most important scientific journals. At the International Electron Device Meeting (IEDM) in 2021, TSMC demonstrated another contact technology that further improved thermal stability and relatively low contact resistance, which was also positively reported in the media.
TSMC continues to research emerging high-density, non-volatile memory components and hardware accelerators to support AI and high-performance computing applications. TSMC works closely with key U.S. universities to provide international solid-state circuits conferences (ISSCC) and Symposiaon VLSI Technology and Circuits, Symp. VLSI) and other high-profile conferences have published several papers on the use of resistive memory (RRAM) for in-memory computing. Memory selectors are key components for high-density non-volatile memory.
At the 2021 Symposium on Mega Integrated Circuit Technology and Circuits, TSMC showcased a high-performance arsenic-free germanium-carbon tellurium threshold selector with record high durability of more than 1011 cycles, a low threshold voltage of about 1.3 volts and a low leakage current of about 5 nanoamps.
At the 2021 International Conference on Electronic Components, TSMC further introduced a nitrogen-doped germanium carbon tellurium selector that is compatible with the post-process process and features ultra-low cycle-to-cycle threshold voltage variations. TSMC also showcased several new technologies to achieve multi-order memory cell (MLC) data storage at the 2021 Mega Integrated Circuit Technology and Circuits Symposium, supporting neural network applications, including phase-varying memory (PCM) for multi-order memory cells, which improves retention time by 100,000 times while keeping the accuracy of inferences within 3%.
Photo caption: The R&D expenditure of the above programs accounts for about 80% of the total R&D budget in 2022, and the total R&D budget is estimated to account for about 8% of the annual revenue in 2022.
In order to maintain the company's technological leadership, TSMC said that the company plans to continue to invest heavily in research and development. As TSMC's advanced CMOS logic technologies of 3nm and 2nm continue to advance, TSMC's forward-looking R&D efforts will focus on 2nm
The following technologies, 3D transistors, new memories, and low-resistance wires have established a solid foundation for future technology platforms.
TSMC's 3DIC Advanced Package Development is developing innovations in subsystem integration to further enhance advanced CMOS logic applications. The Company has also stepped up its focus on special process technologies, such as RF and 3D smart sensors, to support 5G and smart IoT applications.
The Advanced Technology Research division continues to focus on new materials, processes, components and memories that are likely to be adopted in the next eight to ten years. TSMC also continues to collaborate with external research institutions such as academia and industry alliances to provide customers with early access to and adoption of future cost-effective technology and manufacturing solutions.
With a highly competent and dedicated R&D team and a strong commitment to innovation, TSMC is confident that it will be able to drive future business growth and profitability by providing customers with competitive semiconductor technologies.
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