In 2020, after Qualcomm launched the Wear 4100 series chips, it has not updated the Wear series of smart wear chips for more than a year. In the increasingly competitive smart watch market, in the face of competition from Apple and Samsung, many manufacturers who need to purchase smart wearable chips are eager for Qualcomm to launch new chips to improve product performance and endurance performance.
Recently, foreign media Winfuture exposed Qualcomm's new smart wear chip Wear 5100 series, including Two Products of Wear 5100 and Wear 5100+, the difference is that the latter integrates a QCC5100 coprocessor to improve the battery life of smart watches in low-power mode. In the choice of process technology that users are concerned about, the series of chips will cross multiple process nodes, directly jump from the previous generation of 12 nanometers to 4 nanometer processes, and keep up with the development pace of the flagship mobile phone SoC.
Compared with the previous generation of products, the upgrade of qualcomm Wear 5100 series in the process process can be described as "leap". For many manufacturers who want to improve the battery life of smart watches, the arrival of the Wear 5100 series may be a good new choice.
Performance and power consumption?
In the field of smart watches, there are roughly two different product development directions, one focuses on the pursuit of long endurance, and the other pays more attention to the "full intelligence" experience of smart watches. A major factor causing this situation is the chip, even if some manufacturers want to pursue performance and endurance at the same time, but because of the chip computing power and power consumption reasons, they have no choice, either choose a low-power chip to do a light smart watch, or choose Qualcomm's Wear series of chips to develop full smart watches.
In September last year, there was news that the Wear 5100 series would use the A73+A53 architecture, focusing on improving the performance ceiling of the chip. However, from the latest exposed information, Qualcomm seems to have adjusted the development strategy of the Wear series of chips, intending to improve the power consumption performance of the chip.
The Qualcomm Wear 5100 series is powered by four A53 cores (up to 1.7Ghz) with an Adreno702 GPU that supports eMMC 5.1 flash memory and 4GB of LPDDR 4X memory. Compared with the previous generation of wear 4100 series, the CPU core specifications remain the same, but the Wear 5100 series has received a certain range of upgrades in terms of GPU and flash memory. Among them, Samsung's 4nm process process is undoubtedly the core of this upgrade, and it can be seen on the paper parameters that Qualcomm did not choose blind stack parameters, but hoped to improve the performance of the chip and reduce power consumption by replacing the process process, and try to improve the weak endurance of the full smart watch.
In addition, Xiao Lei also discovered some new features of the Wear 5100 series. In terms of camera support, the Wear 5100 series supports dual camera combinations, supporting up to 13 million pixels and 16 million pixel sensors respectively, at the same time, supporting recording 1080P picture quality video when single camera is used, Qualcomm or intended to promote the diversification of smart watches.
Similar to smartphones, many of the new features and features of smartwatches require chip support. Taking the imaging ability of smart watches as an example, smart watches developed for students are equipped with front lenses, and the arrival of wear 5100 series improves the video recording quality of watches, while also allowing some manufacturers to expand the gameplay of smart watches, using a combination of front-facing main camera and ultra-wide angle.
But it is also worth noting that even the Wear 5100 series, which chooses to use the 4nm process, is difficult to fundamentally improve the battery life of smart watches. The Samsung Galaxy Watch4, which has long used a 5-nanometer chip, can only be charged for two days under normal use.
The strength of the endurance of smart watches is importantly related to system scheduling. Manufacturers using all-intelligent systems such as Android and Wear OS, if they want to improve the battery life of smart watches while pursuing watch performance, they can only build a complete set of low-power chips at this stage. In Xiao Lei's view, the Wear 5100 series using the 4-nanometer process process gives smart watch manufacturers a new choice, and no longer use 12-nanometer or even 28-nanometer chips with higher power consumption, which is convenient for further optimization to improve the actual endurance performance of the product.
The field of smart wearable chips also needs to be rolled in
In the past few years, it may be that in addition to Apple and Samsung, other manufacturers have not fully exerted efforts in the field of smart wearable chips. Reflecting on the application of the process process, the Wear 4100 series released by Qualcomm in 2020 and the Wear 3100 in 2018 use 12nm and 28nm process processes, respectively, and Unigroup's W307 and Rockchip's RK2108D also use 28nm processes.
The main reason why manufacturers have not used advanced process technology for smart wearable chips in time is that upstream smart wear chip suppliers do not want to take risks and do not want to directly choose advanced process processes with higher costs before there is clear and sufficient market demand. In the early and middle stages of the development of smart watches, mobile phone manufacturers themselves did not clarify the product positioning of smart watches (such as launching some immature products), nor did they fully understand the actual needs of users, resulting in upstream smart wear chip suppliers choosing more compromise solutions, or maintaining a slower pace of product updates.
Taking OPPO Watch2 series products as an example, since the upstream supply chain chip iteration is slow, performance and power consumption are difficult to meet the design needs of new products, in order to take into account the performance and endurance at the same time, we can only use the "1+1" dual-core solution in another way, using Qualcomm Wear 4100 and Apollo 4s chips with low power consumption on a smart watch, allowing users to switch chip usage schemes according to different use scenarios.
The advantage of Apple and Samsung is that they are both players in the field of smart watches, and at the same time, they have the ability to develop chips, and they are stronger than the upstream supply chain in terms of market insight and anti-risk ability, enabling them to launch 7nm or 5nm wearable chips faster. That is, the market response speed of the integrated development model of "production, education, research and marketing" is faster, and the update iteration of the product does not need to look at the face of the upstream chip manufacturers.
The inner volume of the smart wearable chip industry will help drive the positive development of the entire smart watch industry. On the Apple Watch S6 released in 2020, Apple developed a special S6 chip based on the two small cores of the A13 (7 nanometers), and Samsung is not far behind, and the Exynos W920 released last year was manufactured using its own 5-nanometer process.
In contrast, the Qualcomm Wear 4100 series, which is still using the 12-nanometer process, is several generations behind in the process process, and the chip performance and power consumption are not advantageous. Those who watch Qualcomm release new chips to update products, most of them can only temporarily cut off products, or release "light smart" watches that focus on long endurance. In order to win back the confidence of many partners, Qualcomm may only be able to cross multiple process nodes and use the 4nm process process on the new chip.
From the exposure data of Apple, Samsung's released chips, and Qualcomm Wear 5100 series chips, it can be seen that the flagship smart wearable chip will keep up with the pace of development of mobile phone SoC in the process process. In Xiao Lei's view, whether it is a smart wearable chip or a computing unit of TWS headphones, the use of advanced process technology is the trend of the times, with the change of product use scenarios and user needs, stimulating manufacturers to switch to the updated process technology. After all, in the improvement of chip efficiency, 60% comes from the progress of the process process, 40% from the design, for this kind of "small chip", the use of new process technology is the fastest way to improve the comprehensive ability of the chip.
Is the self-developed chip the end?
Last year, domestic mainstream mobile phone manufacturers accelerated the pace of development of self-developed chips, releasing ISPs or NPUs for mobile phone photography, while in the field of smart wearables, Huami released Huangshan 2S chips based on RISC-V architecture design. In fact, in the technology industry, if manufacturers want to enhance the core competitiveness and premium of products, they can only embark on the road of chip self-research.
Compared with the mobile phone SoC, the development difficulty of smart wearable chips is lower, and it does not need to use the latest version of ARM CPU and GPU architecture. As for the baseband that plagues many manufacturers, the eSIM version of the smart watch is not a strong demand, for many users, under normal circumstances, there is no habit of only taking a smart watch without a mobile phone, and the manufacturer can first develop a Bluetooth version of the product to circle some users.
Secondly, smart wearable chips and mobile phone SoCs are more similar, and domestic manufacturers can accumulate experience and patents in the process of designing and developing smart wearable chips, and promote the construction of self-developed chip systems from the bottom and top. For manufacturers who want to deepen their cultivation in the field of smart watches, in the long run, only by launching their own smart wearable chips will they have the opportunity to achieve overtaking of Apple and Samsung in terms of market share and profit margins, and take the iterative authority and core selling points of the products in their own hands.
From the chip iteration of smart phones and watches in the past two years, it can be detected that the model of relying only on the upstream supply chain to provide chips is too passive, either the chip is delayed in updating, or the chip has such and such problems, which cannot support the high-end development of its products.
Of course, compared with the ISP with a relatively single function, the internal structure of the smart wearable chip is more complex, involving different chip design fields, and even in order to improve the integration of the chip, the SiP packaging process is also needed, which is not enough experience for many domestic mainstream manufacturers in this regard. Apple and Samsung can launch smart wearable chips with excellent performance, mainly due to their accumulation of technology in the field of mobile phone SoCs. Xiao Lei also believes that many domestic manufacturers in the field of science and technology will eventually embark on the road of self-developed chips, with the intensification of market competition, most of the manufacturers who can continue to survive have certain chip design capabilities.