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The first phase of the European self-developed processor is completed: dual architecture, 29 RISC-V cores

In the field of high-performance computing, China and the United States are impacting tens of billions of supercomputing, and Europe is not far behind, launching its own EPI (European Processor Initiative) self-developed processor project, bringing together 28 partners from 10 countries, covering scientific research institutions, supercomputing centers, industry giants, innovative enterprises and so on.

The first phase of the EPI project (2018-2021) has now been successfully completed and is planned to continue until 2033.

The first phase of the EPI project included a general purpose processor (GPP), an accelerator (EPAC), and a car, with the first generation of universal processor codenamed Rhea (the second generation of Greek mythology, Rhea, the goddess of the earth, Gaia, and the daughter of The God of the Sky, Uranos).

The first phase of the European self-developed processor is completed: dual architecture, 29 RISC-V cores

For the technical details of this processor, there are not many official disclosures, and only the two hybrid architectures of ARM and RISC-V are known, the former is based on the ARM Neoverse V1 architecture, which supports efficient, scalable and customizable high-performance computing applications, and the latter has 29 cores.

Memory supports high-bandwidth HBM2E, and the security aspect includes an independently developed security management system (SMS), a Crypto Tile encryption module, and related algorithms.

The first phase of the European self-developed processor is completed: dual architecture, 29 RISC-V cores

According to previous exposure, rhea processors use TSMC 7nm process to support 6-8 channels DDR5 and 4 HBM2E, of which DDR5 support is from ARM architecture and HBM2E support is from RISC-V architecture.

The EPAC accelerator is also a RISC-V architecture to assist with general-purpose processors.

Europe plans to release Europe's first exalement supercomputer based on Rhea processors in 2023.

The first phase of the European self-developed processor is completed: dual architecture, 29 RISC-V cores

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