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Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

author:Core list
Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

On April 26, 2024, the 17th China Electronic Information Annual Conference was grandly opened in Ningbo. In the special forum on "Open and Controllable Development of Integrated Circuits" held in the morning of the same day, Ms. Xu Yun, Co-President of Hejian Industrial Soft, delivered a keynote speech "Multi-dimensional Evolution of Domestic EDA, Helping the Open and Controllable Development of Chips", explaining to the participants the new challenges faced by domestic chip design under the tide of chiplet, AI and other technologies, the new opportunities of the EDA industry, and the latest product matrix and multi-dimensional evolution layout progress of Hejian Industrial Software.

Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

Ms. Xu Yun, Co-President of Hejian Industrial Software

It is urgent for domestic digital large-chip EDA tools to break the situation

At present, the world is facing the stage of "third industrial revolution" with artificial intelligence as the main driving force. Since 2023, semiconductor companies such as NVIDIA, AMD, and Intel have successively launched flagship AI accelerator chips with higher computing power and innovative architectures, promoting the advancement of the "intelligent computing" era. It is worth mentioning that these high-computing power chips all use the chiplet chip design architecture, which subverts the traditional chip design methods in the past, and continues to push up the complexity of EDA tool development. In the first stage, ML is introduced into single-point EDA tools to improve efficiency, and at the same time, new intelligent computing chips bring higher computing power and higher performance to EDA; in the second stage, AI and big data convergence drives the EDA process and comprehensively optimizes the chip PPA design; in the third stage, generative AI and EDA are deeply integrated into the next generation of EDA technology to comprehensively innovate the EDA design process。

At the same time, Ms. Xu Yun pointed out that as the global computing power competition shifts from supercomputing to intelligent computing, the domestic EDA industry is not only facing serious challenges, but also ushering in huge development opportunities and broad growth space. From 2018 to 2022, the compound annual growth rate of chip design enterprises with sales of more than 100 million yuan in China is higher than 28%, but domestic EDA companies are only about half of the growth rate of chip design enterprises, and the development potential is huge. However, due to the inherent characteristics of the EDA track itself, such as high technical threshold, deep moat, high accumulation and high investment, local enterprises still lack world-class leaders and top technical talents, mainly focus on the development of single-point tools, lack of full-chain enterprises, and lack of experience and ability in mergers and acquisitions, and the upstream and downstream ecological coordination of the industrial chain needs to be optimized urgently.

Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

Digital chips are the main driving force in the innovation and transformation of the digital economy, and supercomputing/intelligent computing chips are all large-scale digital chips, with the global chip market size of 573.5 billion US dollars in 2022, and digital chips accounting for 84.48%, which shows that domestic EDA urgently needs to make breakthroughs in the field of digital chips.

Hejian Gongsoft's multi-dimensional evolution and platform-based development strategy

The one who takes advantage of it is also the one who cannot be lost. In the past few years, driven by policies and capital, the domestic EDA industry has developed rapidly. Since the company was officially put into operation, Hejian has successfully seized the industrial outlet and entered the fast lane of development, from the company's product line layout to the construction of large-scale organizational structure, it has adhered to the multi-dimensional evolution route at multiple levels.

At present, the number of employees has exceeded 1,000, more than a dozen products have been launched and the product line has been continuously upgraded, quickly forming a multi-point layout of digital chip full-process EDA tools and design IP, and at the same time making efforts in system-level EDA to build a "chip-software-system-application" digital chip and machine system linkage design and industrial ecology. Hejian has set up offices and R&D institutions in more than 10 cities and regions, and opened offices in Japan and Singapore.

Behind such a proud achievement in a short period of time is the combination of internal and external development strategy adhered to by Hejian Gongsoft: technological innovation + ecological construction + mergers and acquisitions. While attracting internationally renowned experts and cultivating talent echelons, Hejian Gongsoft pays attention to the DTCO concept to guide the collaborative design of chips, coupled with keen market insight, and initiates mergers and acquisitions in a timely manner.

In terms of EDA tool R&D and whole-process construction, Hejian Gongsoft adheres to the strategy of "multi-dimensional evolution". Its core foundation comes from: the current digital system and chip design, whether it is AI, supercomputing, or automobile, 5G electronic system, must first carry out a top-level system design, including chips, complete systems and software. This process encompasses architecture design, IP import, and software collaboration. The increase in the complexity of digital chip design continues to push up the verification time cost, and the time and cost required for the "verification" link are huge, which is crucial to the success of the chip in the first time to bring an accurate and efficient verification platform to the verification engineer. In addition, the trade-offs between chiplet architecture, packaging, and PCB design are also closely related to system design, and it is necessary to ensure that the joint optimization of chip design and manufacturing, as well as the convergence of EDA tool results, can show customers the best PPA effect.

At the conference site, Hejian Gongsoft displayed 9 EDA tools covering multiple dimensions such as system, IP, implementation, verification, chip/package/PCB, and some of them have been iterated. These self-developed EDA tools for the whole process of chip design demonstrate the "multi-dimensional evolution" strategy of Hejian Gongsoft from all angles. These tool platforms include:

Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA
Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

In the "Verification+" dimension, Hejian has brought V-Builder/vSpace, a commercial-grade virtual prototyping and simulation tool suite, and UVHS, a commercial-grade full-scene verification hardware system.

The commercial-grade full-scene verification hardware system UVHS integrates hardware simulation mode and prototype verification mode, and integrates "emulation+prototyping" to provide two modes of prototype verification and hardware simulation through software switching on the same hardware. At present, V-Builder/vSpace and UVHS have been tested by the whole process of mainstream large-chip projects of many customers, and have successfully solved the problem of ultra-large-scale chip software and hardware collaborative verification.

In the "Digital+" dimension, Hejian Gongsoft has launched UniVista Tespert ATPG, an automatic test vector generation tool. The product integrates the Debugger tool and uses a multi-threaded parallel engine to help engineers implement design for test (DFT) in large-scale SoC IC designs, effectively reduce test costs, improve chip quality and yield, shorten chip design cycles, and facilitate rapid signoff of integrated circuit testing.

In the dimension of "chip +", Hejian has brought UniVista Archer, a new generation of electronic system design platform for the enterprise, including UniVista Archer Schematic schematic design platform and Univista Archer PCB layout design platform, combined with the latest generation of UniVista EDMPro electronic system R&D and management platform, to build an electronic system and chip design linkage platform, and connect the electronic system and PCB level, the centralized management of packaging blocking points, so that the electronic system and chip design are truly "core-machine linkage".

In addition, Hejian Gongsoft adheres to the dual-track principle of "self-development + M&A" in the implementation of the "EDA + IP" strategy. At present, it is not only developing the core IP of large digital chips such as DDR, PCle, HBM, etc., but also through the acquisition of Beijing Nuori Integrated Circuit Design Co., Ltd., it has realized the national production of complete solutions such as Memory Interface, PCIe Gen5 and RDMA/Ethernet, as well as Chiplet interface and IO Die.

AI+EDA, Hejian Gongsoft accelerates and overtakes

In the era of artificial intelligence, a powerful AI engine can fully empower the development of EDA technology. Based on the LLM engine, Hejian Soft's commercial digital EDA platform will help engineers verify and analyze faster, optimize PPA and accelerate chip mass production at the level of functional verification, design implementation and test and mass production.

See the local feelings of the R&D team

As the "crown jewel" of the semiconductor industry, the EDA industry has a high development threshold, large investment, and difficulty in building and cultivating talents. Since its establishment, Hejian has insisted on paying equal attention to R&D investment and talent training, and has never forgotten the original intention of "creating EDA tools comparable to international standards". In the roundtable forum, Ms. Xu Yun introduced that Hejian has invested more than 1 billion yuan in R&D in the past two years, and the company's operation team has rich experience in customer service, and most of the R&D team members are professional and senior, and most of them have overseas experience.

Xu Yun of Hejian Gongsoft: The multi-dimensional evolution of domestic EDA and the new challenges of "Chiplet + AI" to EDA

Ms. Xu Yun pointed out that chiplets pose a number of challenges to chip design and EDA tools. In addition to the technical challenges to overcome on the manufacturing side, the "Top Down" and "Bottom Up" design patterns brought about by the chiplet architecture make EDA vendors need to weigh different technical routes. Generative AI and chiplets have opened up the mindset of digital chip front-end design, and at the same time, put forward more stringent requirements for EDA tools in terms of controllability. In this regard, Hejian Gongsoft adheres to the multi-dimensional evolution route, works step by step, is not afraid of challenges, and continues to play a greater role in the independent and controllable journey of the EDA industry in mainland China.

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