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Nvidia is looking at further improving GPU ray tracing performance by up to 20%

NVIDIA researchers have been exploring how to further improve the ray tracing performance of GPUs, and some netizens have found a recent paper published by NVIDIA, which regards "GPU Subwarp Interleaving" as a technology to improve ray tracing performance, with an increase of up to 20%.

Nvidia is looking at further improving GPU ray tracing performance by up to 20%

Achieving such a large performance improvement is not a simple task, and microarchitectures need to be adjusted, otherwise the use of technology will be limited. Since new technologies rely on architecture extensions, the existing Turing and Ampere architectures can be basically excluded, and it is expected that they will not be seen in the generation after the Ada Lovelace architecture at the earliest. As ray tracing technology becomes more and more widely used in the graphics field, NVIDIA will solve the performance problems caused by ray tracing from multiple angles to maintain the competitiveness of its products and promote them in marketing.

In the paper, the limitations of ray tracing performance in the current design methods of NVIDIA GPUs are discussed. At present, in order to meet the needs of massively parallel computing, GPUs use the SIMD execution mode, and the inputs of several identical operations will be packaged into a set of parallel executions, which is the smallest execution unit of the GPU, which NVIDIA calls "warp". GPUs hide pauses by mobilizing warp, but in real-time ray tracing operations, problems can occur that can lead to performance losses, and "GPU Subwarp Interleaving" is a solution to the current GPU dilemma.

Nvidia is looking at further improving GPU ray tracing performance by up to 20%

Using a suite of applications with ray-traced workloads on a modified, enhanced Turing architecture GPU, the researchers achieved performance gains of an average of 6.3 percent and up to 20 percent. Existing GeForce graphics cards cannot achieve such an effect through driver updates, and this new technology can only be applied to future architectures.

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