Professor Hideharu Amano of Keio University is certainly a very well-known figure in the computer world (perhaps better known as Professor Funga), but he finally retired at the end of March this year. This last lecture has been made public, which is indeed typical of Professor Funga.
In the evolution of the ISA, he stated that RISC-V has the advantage of a complex instruction set and modularity, but this disadvantage has not yet been pointed out.
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As a built-in controller, RISC-V is attractive
The reason for the use of RISC-V as an accelerator is purely a matter of cost, and it has nothing to do with whether it is Arm or not. In fact, many accelerators that were developed not so long ago and are currently in mass production are based on Arm. Prior to this, PowerPC and MIPS were used, so it was not a technical issue that it had to be RISC-V.
So the problem is purely a matter of price, and of course, if you buy IP from outside to shorten the development cycle, you will need to pay licenses and royalties (this will vary depending on which vendor you buy the IP from, but in general, it is better than Arm. However, if you're a company that wants to make your own accelerator, it's not that difficult to develop RISC-V cores, and there are also free RISC-V cores (the most popular). One is Rocket, but there are many other cores that are available for free and are commercially available), so it can be said that the barrier to creating your own CPU cores with these cores is quite low.
In the past, when it came to controllers for these accelerators, there was the option to "make it yourself" instead of buying CPU IP from an external source, but recently this has almost disappeared due to software support.
Even if it's dedicated to your own controller, you'll need at least a compiler, assembler, and debugger, and possibly a profiler. If you're using bare metal, you probably don't need an operating system or libraries, but it's hard to say that now. Compilers, assemblers, and debuggers can be ported to gcc/gas and gdb "simply", but if you've never done this before, then it's very difficult, and most importantly, if you start trying to run an RTOS or Linux, the engineering costs will increase.
With RISC-V, all of this already exists and the cost of porting software can be completely reduced. Unless there is a good reason, there is no longer an option not to use RISC-V.
My current view is that x86, Arm, and RISC-V will continue to coexist for the time being, and I agree with that. Recently, Arm, or rather Qualcomm, has been aggressively targeting the PC client market, but I personally feel that it is only compatible with Qualcomm's SoCs (such as MediaTek and Samsung's SoCs that are not supported).
Of course, this is possible because Qualcomm has invested a lot of resources in software development for Windows on Arm, and it is difficult for other companies to operate unless they invest equal or more software development resources. The big question seems to be whether there is a market that can support the cost.
As a result, x86 will continue to be used for clients and more and more for servers in the cloud, but x86 will still be overwhelming in terms of general purpose. It looks like it will be about another 10 years before it competes with x86, and at that point RISC-V-based servers will likely follow.
For embedded applications, things that were previously implemented using x86-based SBCs (single board computers) are increasingly being replaced by Arm, while Arm applications that replace screens (including screens with HMIs such as KIOSK, as well as digital signage types) are clearly becoming more and more popular, as things that require it are also becoming Android-based. However, RISC-V is also entering the scene, so I don't think we can rule out the possibility of "deterioration" as you say.
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FPGA controllers, a hundred flowers
Now, this time the topic is a new discussion in RISC-V. What is it? It's an FPGA controller. As you know, FPGAs can create arbitrary circuits by arranging LUTs (look-up tables) in a two-dimensional matrix and making it possible to use programs (bitstreams) to change the settings of each LUT and the connections between the LUTs.
However, a LUT is basically SRAM and requires at least 6 transistors to build a 1-bit LUT. In fact, FPGAs are usually 4 inputs/4 outputs or 6 inputs/6 outputs, so the number of transistors used is even higher.
Of course, the advantage of FPGA is that the circuit can be changed freely, and anything can be modified on the spot at a later stage, which makes up for the disadvantage of wasting the number of transistors, and it is rapidly popularized.
However, when FPGAs are initially used for small-scale glue logic, such as small I/F conversions or adding small features, that's fine, but with the miniaturization of the process, you'll have more leeway for the same die size if you can use a lot of transistors = increase the number of LUTs, so you'll want to install a small controller.
As a result, FPGA vendors have begun to provide IP for small MCUs running on FPGAs. Specifically, there are the following:
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Xilinx
They started offering the 32-bit kernel "MicroBlaze" in 2002. Architecturally, MicroBlaze is built on a foundation called DLX, which is based on Stanford MIPS, which is also used as a university textbook.
Initially, only Level 3 MCU cores were offered, but later Level 5 real-time controller cores and Level 8 application processor cores were added. MicroBlaze support was added to the Linux kernel source tree in 2009. In 2004, they also started offering 8-bit "PicoBlaze".
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Changes
In 2001, they first began providing IP for 16-bit Nios embedded processors, and later released 32-bit Nios-II. This is also RISC-based, but it features a very wide range of configurations, no pipelines, and can run with the same resources as Nios (although the performance is reasonable).
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Lattice
First, they released 8-bit "LatticeMico8". Then, in 2006, the "LatticeMico32" was launched. The minimum configuration has around 2,400 LUTs, so it's much larger than the Mico8, but still compact for a 32-bit MCU with a 6-stage pipeline configuration.
This Mico32 is open source (Mico8 is closed source) and has an I/F called "Wishborn", and it can also be in quite complex configurations by using peripheral circuitry that is compatible with this Wishborn.
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Actel
In 2007, it began offering two products: "Core8051s" based on 8051 and "CoreABC" proprietary architecture. Initially, the company offered a hard core called the "Core8051" for the "ProASIC Plus" family of FPGAs, but the Core8051s are the version of the LUTs that have been ported to the FPGA, which can also run on the company's Fusion FPGAs.
CoreABC, on the other hand, is a unique CPU IP that can be customized to the bus width, and since it is very small, with a minimum of 241 LUTs, it can also run on IGLOO FPGAs.
Something like that. In 2007, Atmel also released a product called CAP (Customizable Atmel Microcontroller), which is a metal programmable logic gate with an ARM9 core (a semi-custom ASIC in which the wiring layer is customized and fabricated by the user, unlike FPGAs).
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Arm's sortie
Targeting this market, Arm released the Cortex-M1 in 2007, but I haven't heard of it being widely used. In retrospect, with this announcement from ARM, Xilinx's "Virtex" and Altera's "Stratix", in addition to Actel, are both high-end FPGAs that do not require an MCU, or rather an application processor, and the Cortex-M1 seems to be due to its lack of power (the Cortex-M1 is too big for Spartan and Cyclone).
However, since then, the capacity of FPGAs has increased rapidly, and the direction has begun to shift from the previous configuration of "ASIC or ASSP+FPGA" to "individual FPGAs". This is the path to what is known as the "Fall of Darkness". In this case, an application processor is required instead of an MCU.
Xilinx introduced the PowerPC 405 in the Virtex-II Pro family in 2002. In 2006 it was replaced by the "PowerPC 440" in the "Virtex-5 FXT", but in 2011 in its successor "Zynq" it was changed to "Cortex-A9". Since then, the company has introduced a lineup of SoC FPGA families with Cortex-A and Cortex-R cores, followed by the latest Versal series.
In 2011, Altera also released the Arria V and Cyclone V with Cortex-A9, and this technology has been carried over to the current high-end Agilex.
Actel is going in a slightly different direction. After being acquired by Microchip, the company's Fusion FPGA now integrates Cortex-M3. Lattice is still in the low-density FPGA market, so there is no talk of such application integration. In short, until around 2017, the trend in MCUs was to use soft CPU IP and application processors to implement hard IP. In the MCU market that uses soft-core IP, each company uses its own proprietary products, and compatibility is non-existent.
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RISC-V, dominate the rivers and lakes
With the advent of RISC-V, this trend began to change. Microchip was the first to join in, receiving the E31 core from SiFive and starting to offer it as a soft-core IP called MI-V. Launched as the successor to the SmartFusion, PolarFire is now equipped with a hardcore RISC-V.
As expected, it would be impossible to achieve MI-V even at the IGLOO level, so I guess they had no choice but to cut such a small capacity.
Next up is Lattice, which will begin offering soft-core RISC-V on a new development environment called "Lattice Propel" in 2021. Also in 2021, Intel began offering the RISC-V-compatible NIOS V/m as a successor to NIOS-II (also briefly mentioned here). The last remaining company is Xilinx, which also began offering RISC-V-compatible soft cores called "MicroBlaze V" in November 2023.
Recently, Efinix, an American FPGA startup, released a product called "Titanium Ti375" on April 8. The company's LUTs range from 35K to 1M, positioning it in the low-to-midrange compared to others, but it appears to have a 4-core RISC-V core running at over 1GHz as an application processor.
In short, before you know it, the MCU market for FPGAs has become 100% RISC-V-based, and we're gradually moving into the application processor market (Microchip's PolarFire also has 4 RV64GC cores with MMUs and Monitor (which is obviously for application processors).
Although the market size is not large, in the sense of completely occupying the market, it can be said that RISC-V has an absolute monopoly in this field.
Link to original article
https://pc.watch.impress.co.jp/docs/period/dietbit/1584255.html
Source | Semiconductor Industry Watch (ID: icbank) compiled from pcwatc
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