#老師為什麼我總是記不住系列#MSP430寄存器中文注釋

MSP430寄存器中文注釋---P1/2口（帶中斷功能）

#defineP1IN_              0x0020 

const sfrb P1IN           =P1IN_;

#defineP1OUT_             0x0021 

sfrb   P1OUT             =P1OUT_;

#defineP1DIR_             0x0022 

sfrb   P1DIR             =P1DIR_;

#defineP1IFG_             0x0023 

sfrb    P1IFG            = P1IFG_;

#defineP1IES_             0x0024 

sfrb   P1IES             =P1IES_;

#defineP1IE_              0x0025 

sfrb   P1IE             = P1IE_;

#defineP1SEL_             0x0026 

sfrb   P1SEL             =P1SEL_;

#defineP2IN_              0x0028 

const sfrb P2IN           =P2IN_;

#defineP2OUT_             0x0029 

sfrb   P2OUT             =P2OUT_;

#defineP2DIR_             0x002A 

sfrb   P2DIR             =P2DIR_;

#defineP2IFG_             0x002B 

sfrb   P2IFG             =P2IFG_;

#defineP2IES_             0x002C 

sfrb   P2IES             =P2IES_;

#defineP2IE_              0x002D 

sfrb   P2IE             = P2IE_;

#defineP2SEL_             0x002E 

sfrb   P2SEL             =P2SEL_;

MSP430寄存器中文注釋---P3/4口 （無中斷功能）

#defineP3IN_              0x0018 

const sfrb P3IN           =P3IN_;

#defineP3OUT_             0x0019 

sfrb   P3OUT             =P3OUT_;

#define P3DIR_             0x001A 

sfrb   P3DIR             =P3DIR_;

#defineP3SEL_             0x001B 

sfrb   P3SEL             =P3SEL_;

#defineP4IN_              0x001C 

const sfrb P4IN           =P4IN_;

#defineP4OUT_             0x001D 

sfrb   P4OUT             =P4OUT_;

#defineP4DIR_             0x001E 

sfrb   P4DIR             =P4DIR_;

#defineP4SEL_             0x001F 

sfrb   P4SEL             =P4SEL_;

#defineP5IN_              0x0030 

const sfrb P5IN           =P5IN_;

#defineP5OUT_             0x0031 

sfrb   P5OUT             =P5OUT_;

#defineP5DIR_             0x0032 

sfrb   P5DIR             =P5DIR_;

#defineP5SEL_             0x0033 

sfrb    P5SEL            = P5SEL_;

#defineP6IN_              0x0034 

const sfrb P6IN           =P6IN_;

#defineP6OUT_             0x0035 

sfrb   P6OUT             =P6OUT_;

#defineP6DIR_             0x0036 

sfrb    P6DIR            = P6DIR_;

#defineP6SEL_             0x0037 

sfrb   P6SEL             =P6SEL_;

MSP430寄存器中文注釋--- 硬體乘法器

#defineMPY_               0x0130  ------>Multiply

sfrw   MPY              = MPY_;

#defineMPYS_              0x0132  -------> Unsigned Multiply

sfrw   MPYS             = MPYS_;

#defineMAC_               0x0134  -------> Unsigned Multiply Accumlate

sfrw    MAC              = MAC_;

#defineMACS_              0x0136  ------->Signed Multiply Accumlate

sfrw   MACS             = MACS_;

#defineOP2_               0x0138 

sfrw   OP2              = OP2_;

#defineRESLO_             0x013A 

sfrw   RESLO             =RESLO_;

#defineRESHI_             0x013C 

sfrw   RESHI             =RESHI_;

#defineSUMEXT_            0x013E 

const sfrw SUMEXT         = SUMEXT_;

MSP430寄存器中文注釋---看門狗和定時器

#defineWDTCTL_            0x0120

sfrw   WDTCTL            =WDTCTL_;

#defineWDTIS0             0x0001         

#define WDTIS1             0x0002         

#defineWDTSSEL            0x0004         

#defineWDTCNTCL           0x0008            

#defineWDTTMSEL           0x0010         

#defineWDTNMI             0x0020         

#defineWDTNMIES           0x0040         

#defineWDTHOLD            0x0080         

#defineWDTPW              0x5A00         

#define WDT_MDLY_32        WDTPW+WDTTMSEL+WDTCNTCL                        

#define WDT_MDLY_8         WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0                 

#define WDT_MDLY_0_5       WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1                 

#define WDT_MDLY_0_064     WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0          

#define WDT_ADLY_1000      WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL                

#define WDT_ADLY_250       WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0         

#define WDT_ADLY_16         WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1         

#define WDT_ADLY_1_9       WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0  

#define WDT_MRST_32        WDTPW+WDTCNTCL                                 

#define WDT_MRST_8         WDTPW+WDTCNTCL+WDTIS0                          

#define WDT_MRST_0_5       WDTPW+WDTCNTCL+WDTIS1                          

#define WDT_MRST_0_064     WDTPW+WDTCNTCL+WDTIS1+WDTIS0                   

#define WDT_ARST_1000      WDTPW+WDTCNTCL+WDTSSEL                         

#define WDT_ARST_250       WDTPW+WDTCNTCL+WDTSSEL+WDTIS0                  

#define WDT_ARST_16        WDTPW+WDTCNTCL+WDTSSEL+WDTIS1                  

#define WDT_ARST_1_9       WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0           

MSP430寄存器中文注釋---A/D采樣寄存器定義

#define ADC12CTL0_          0x0;'

sfrw    ADC12CTL0        = ADC12CTL0_;

#define ADC12CTL1_         0x01A2 

sfrw   ADC12CTL1         = ADC12CTL1_;

#define ADC12IFG_          0x01A4 

sfrw   ADC12IFG          = ADC12IFG_;

#define ADC12IE_           0x01A6 

sfrw   ADC12IE           = ADC12IE_;

#defineADC12IV_           0x01A8 

sfrw   ADC12IV           = ADC12IV_;

#define ADC12MEM_          0x0140 

#ifndef __IAR_SYSTEMS_ICC

#defineADC12MEM           ADC12MEM_

#else

#defineADC12MEM           ((int*) ADC12MEM_)

#endif

#define ADC12MEM0_         ADC12MEM_

sfrw   ADC12MEM0         = ADC12MEM0_;

#define ADC12MEM1_         0x0142 

sfrw   ADC12MEM1         = ADC12MEM1_;

#define ADC12MEM2_         0x0144 

sfrw   ADC12MEM2         = ADC12MEM2_;

#define ADC12MEM3_         0x0146 

sfrw   ADC12MEM3         = ADC12MEM3_;

#define ADC12MEM4_         0x0148 

sfrw   ADC12MEM4         = ADC12MEM4_;

#define ADC12MEM5_         0x014A 

sfrw   ADC12MEM5         = ADC12MEM5_;

#define ADC12MEM6_         0x014C 

sfrw   ADC12MEM6         = ADC12MEM6_;

#define ADC12MEM7_          0x014E 

sfrw   ADC12MEM7         = ADC12MEM7_;

#define ADC12MEM8_         0x0150 

sfrw   ADC12MEM8         = ADC12MEM8_;

#define ADC12MEM9_         0x0152 

sfrw   ADC12MEM9         = ADC12MEM9_;

#define ADC12MEM10_        0x0154 

sfrw    ADC12MEM10        =ADC12MEM10_;

#define ADC12MEM11_        0x0156 

sfrw    ADC12MEM11        =ADC12MEM11_;

#define ADC12MEM12_        0x0158 

sfrw    ADC12MEM12        =ADC12MEM12_;

#define ADC12MEM13_        0x015A 

sfrw    ADC12MEM13        =ADC12MEM13_;

#define ADC12MEM14_        0x015C 

sfrw    ADC12MEM14        =ADC12MEM14_;

#define ADC12MEM15_        0x015E 

sfrw    ADC12MEM15        =ADC12MEM15_;

#define ADC12MCTL_         0x0080 

#ifndef __IAR_SYSTEMS_ICC

#define ADC12MCTL          ADC12MCTL_

#else

#define ADC12MCTL          ((char*) ADC12MCTL_)

#endif

#define ADC12MCTL0_         ADC12MCTL_

sfrb    ADC12MCTL0        =ADC12MCTL0_;

#define ADC12MCTL1_        0x0081 

sfrb    ADC12MCTL1        =ADC12MCTL1_;

#define ADC12MCTL2_        0x0082 

sfrb    ADC12MCTL2        =ADC12MCTL2_;

#define ADC12MCTL3_        0x0083 

sfrb    ADC12MCTL3        =ADC12MCTL3_;

#define ADC12MCTL4_        0x0084 

sfrb    ADC12MCTL4        =ADC12MCTL4_;

#define ADC12MCTL5_        0x0085 

sfrb    ADC12MCTL5        =ADC12MCTL5_;

#define ADC12MCTL6_        0x0086 

sfrb    ADC12MCTL6        =ADC12MCTL6_;

#define ADC12MCTL7_        0x0087 

sfrb    ADC12MCTL7        =ADC12MCTL7_;

#define ADC12MCTL8_        0x0088 

sfrb    ADC12MCTL8        =ADC12MCTL8_;

#define ADC12MCTL9_        0x0089 

sfrb    ADC12MCTL9        =ADC12MCTL9_;

#define ADC12MCTL10_        0x008A 

sfrb    ADC12MCTL10       =ADC12MCTL10_;

#define ADC12MCTL11_        0x008B 

sfrb    ADC12MCTL11       =ADC12MCTL11_;

#define ADC12MCTL12_        0x008C 

sfrb    ADC12MCTL12       =ADC12MCTL12_;

#define ADC12MCTL13_        0x008D 

sfrb    ADC12MCTL13       =ADC12MCTL13_;

#define ADC12MCTL14_        0x008E 

sfrb    ADC12MCTL14       =ADC12MCTL14_;

#define ADC12MCTL15_        0x008F 

sfrb    ADC12MCTL15       =ADC12MCTL15_;

#defineADC12SC            0x001           

#defineENC                0x002        

#define ADC12TOVIE         0x004        

#define ADC12OVIE          0x008        

#defineADC12ON            0x010        

#define REFON              0x020        

#defineREF2_5V            0x040        

#defineMSH                0x080        

#defineMSC                0x080        

#defineSHT0_0              0*0x100      

#defineSHT0_1              1*0x100      

#defineSHT0_2              2*0x100      

#defineSHT0_3              3*0x100      

#defineSHT0_4              4*0x100      

#defineSHT0_5              5*0x100      

#defineSHT0_6              6*0x100      

#defineSHT0_7              7*0x100      

#defineSHT0_8              8*0x100      

#defineSHT0_9              9*0x100      

#defineSHT0_10            10*0x100        

#define SHT0_11            11*0x100      

#defineSHT0_12            12*0x100      

#defineSHT0_13            13*0x100      

#defineSHT0_14            14*0x100      

#defineSHT0_15            15*0x100      

#defineSHT1_0              0*0x100      

#defineSHT1_1              1*0x100      

#defineSHT1_2              2*0x100      

#defineSHT1_3              3*0x100      

#defineSHT1_4              4*0x100      

#defineSHT1_5              5*0x100      

#defineSHT1_6              6*0x100      

#defineSHT1_7              7*0x100      

#defineSHT1_8              8*0x100      

#defineSHT1_9              9*0x100      

#defineSHT1_10            10*0x100        

#defineSHT1_11            11*0x100      

#defineSHT1_12            12*0x100      

#defineSHT1_13            13*0x100      

#defineSHT1_14            14*0x100      

#defineSHT1_15            15*0x100      

#define ADC12BUSY          0x0001        

#defineCONSEQ_0            0*2          

#defineCONSEQ_1            1*2          

#defineCONSEQ_2            2*2          

#defineCONSEQ_3            3*2          

#define ADC12SSEL_0         0*8          

#define ADC12SSEL_1         1*8          

#define ADC12SSEL_2         2*8          

#define ADC12SSEL_3         3*8          

#define ADC12DIV_0          0*0x20       

#define ADC12DIV_1           1*0x20       

#define ADC12DIV_2          2*0x20       

#define ADC12DIV_3          3*0x20       

#define ADC12DIV_4          4*0x20       

#define ADC12DIV_5          5*0x20       

#define ADC12DIV_6          6*0x20       

#define ADC12DIV_7          7*0x20       

#defineISSH                0x0100       

#defineSHP                 0x0200       

#defineSHS_0               0*0x400      

#defineSHS_1               1*0x400      

#defineSHS_2               2*0x400      

#defineSHS_3               3*0x400      

#define CSTARTADD_0         0*0x1000     

#define CSTARTADD_1         1*0x1000     

#define CSTARTADD_2         2*0x1000     

#define CSTARTADD_3         3*0x1000     

#define CSTARTADD_4         4*0x1000     

#define CSTARTADD_5         5*0x1000     

#define CSTARTADD_6         6*0x1000     

#define CSTARTADD_7         7*0x1000     

#define CSTARTADD_8         8*0x1000     

#define CSTARTADD_9         9*0x1000     

#define CSTARTADD_10       10*0x1000     

#define CSTARTADD_11       11*0x1000     

#define CSTARTADD_12       12*0x1000     

#define CSTARTADD_13        13*0x1000          

#define CSTARTADD_14       14*0x1000         

#define CSTARTADD_15       15*0x1000     

#defineINCH_0              0                

#define INCH_1              1                

#defineINCH_2              2                

#defineINCH_3              3                

#defineINCH_4              4                

#define INCH_5              5                

#defineINCH_6              6                

#defineINCH_7              7                

#defineINCH_8              8                

#defineINCH_9              9                

#defineINCH_10            10                

#defineINCH_11            11                

#defineINCH_12            12                

#defineINCH_13            13                

#defineINCH_14            14                

#defineINCH_15            15                

#defineSREF_0              0*0x10           

#define SREF_1              1*0x10           

#defineSREF_2              2*0x10           

#defineSREF_3              3*0x10           

#defineSREF_4              4*0x10           

#defineSREF_5              5*0x10           

#defineSREF_6              6*0x10           

#defineSREF_7              7*0x10           

#defineEOS                0x80              

MSP430寄存器中文注釋----序列槽寄存器

#definePENA               0x80       

#definePEV                0x40       

#defineSPB                0x20       

#defineCHAR               0x10       

#defineLISTEN             0x08       

#defineSYNC               0x04       

#defineMM                 0x02       

#defineSWRST              0x01       

#defineCKPH               0x80           

#defineCKPL               0x40       

#defineSSEL1              0x20       

#defineSSEL0              0x10       

#defineURXSE              0x08       

#defineTXWAKE             0x04       

#defineSTC                0x02       

#defineTXEPT              0x01       

#defineFE                 0x80                   

#definePE                 0x40        

#define OE                 0x20        

#defineBRK                0x10        

#defineURXEIE             0x08        

#defineURXWIE             0x04        

#defineRXWAKE             0x02        

#defineRXERR              0x01        

#defineU0CTL_             0x0070 

sfrb   U0CTL             =U0CTL_;

#defineU0TCTL_            0x0071 

sfrb   U0TCTL            =U0TCTL_;

#defineU0RCTL_            0x0072 

sfrb   U0RCTL            =U0RCTL_;

#define U0MCTL_            0x0073 

sfrb   U0MCTL            =U0MCTL_;

#defineU0BR0_             0x0074 

sfrb   U0BR0             =U0BR0_;

#defineU0BR1_             0x0075 

sfrb   U0BR1             =U0BR1_;

#defineU0RXBUF_           0x0076 

const sfrb U0RXBUF        = U0RXBUF_;

#defineU0TXBUF_           0x0077 

sfrb   U0TXBUF           = U0TXBUF_;

#defineUCTL0_             0x0070 

sfrb   UCTL0             =UCTL0_;

#defineUTCTL0_            0x0071 

sfrb   UTCTL0            =UTCTL0_;

#defineURCTL0_            0x0072 

sfrb   URCTL0            =URCTL0_;

#defineUMCTL0_            0x0073 

sfrb   UMCTL0            =UMCTL0_;

#defineUBR00_             0x0074 

sfrb   UBR00             =UBR00_;

#defineUBR10_             0x0075 

sfrb   UBR10             =UBR10_;

#defineRXBUF0_            0x0076 

const sfrb RXBUF0         = RXBUF0_;

#defineTXBUF0_            0x0077 

sfrb   TXBUF0            =TXBUF0_;

#defineUCTL_0_            0x0070 

sfrb   UCTL_0            =UCTL_0_;

#defineUTCTL_0_           0x0071 

sfrb   UTCTL_0           = UTCTL_0_;

#define URCTL_0_           0x0072 

sfrb   URCTL_0           = URCTL_0_;

#defineUMCTL_0_           0x0073 

sfrb   UMCTL_0           = UMCTL_0_;

#defineUBR0_0_            0x0074 

sfrb   UBR0_0            =UBR0_0_;

#defineUBR1_0_            0x0075 

sfrb   UBR1_0            =UBR1_0_;

#defineRXBUF_0_           0x0076 

const sfrb RXBUF_0        = RXBUF_0_;

#define TXBUF_0_           0x0077 

sfrb   TXBUF_0           = TXBUF_0_;

#defineU1CTL_             0x0078 

sfrb   U1CTL             =U1CTL_;

#defineU1TCTL_            0x0079 

sfrb   U1TCTL            =U1TCTL_;

#defineU1RCTL_            0x007A 

sfrb    U1RCTL           = U1RCTL_;

#defineU1MCTL_            0x007B 

sfrb   U1MCTL            =U1MCTL_;

#defineU1BR0_             0x007C 

sfrb   U1BR0             =U1BR0_;

#defineU1BR1_             0x007D 

sfrb   U1BR1             =U1BR1_;

#defineU1RXBUF_           0x007E 

const sfrb U1RXBUF        = U1RXBUF_;

#defineU1TXBUF_           0x007F 

sfrb   U1TXBUF           = U1TXBUF_;

#defineUCTL1_             0x0078 

sfrb   UCTL1             =UCTL1_;

#defineUTCTL1_            0x0079 

sfrb   UTCTL1            =UTCTL1_;

#defineURCTL1_            0x007A 

sfrb   URCTL1            =URCTL1_;

#defineUMCTL1_            0x007B 

sfrb   UMCTL1            =UMCTL1_;

#defineUBR01_              0x007C 

sfrb   UBR01             =UBR01_;

#defineUBR11_             0x007D 

sfrb   UBR11             =UBR11_;

#defineRXBUF1_            0x007E 

const sfrb RXBUF1         = RXBUF1_;

#defineTXBUF1_            0x007F 

sfrb   TXBUF1            =TXBUF1_;

#defineUCTL_1_            0x0078 

sfrb   UCTL_1            =UCTL_1_;

#defineUTCTL_1_           0x0079 

sfrb   UTCTL_1           = UTCTL_1_;

#define URCTL_1_           0x007A 

sfrb   URCTL_1           = URCTL_1_;

#defineUMCTL_1_           0x007B 

sfrb   UMCTL_1           = UMCTL_1_;

#defineUBR0_1_            0x007C 

sfrb   UBR0_1            =UBR0_1_;

#defineUBR1_1_            0x007D 

sfrb   UBR1_1            =UBR1_1_;

#defineRXBUF_1_           0x007E 

const sfrb RXBUF_1        = RXBUF_1_;

#define TXBUF_1_           0x007F 

sfrb   TXBUF_1           = TXBUF_1_;