Reporting by XinZhiyuan
EDIT: Sleepy
TSMC is about to spend nearly NT$1 trillion to build a 2nm fab on a golf course near the Zhongke Park and reserve land for the follow-up 1nm factory.
Recently, TSMC officially proposed a 2nm and subsequent 1nm factory expansion plan.
The total investment is expected to be as high as NT$800 billion to NT$1 trillion (about 184-230 billion yuan), covering an area of nearly 1 million square meters.
According to the United News Network, the new factory in the Central Science Park (Zhongke) will occupy a golf course and part of the public land in the surrounding area.
This is also the second 2nm fab planned by TSMC after Zhuke Baoshan.
The industry pointed out that compared with the TSMC Zhuke Baoshan 2nm factory, which still needs to be solved in the follow-up land use problem, the land ownership of Taichung Golf Course is simple, and once the negotiation with Xingnong Group is completed, it is likely to exceed the progress of the construction of the Zhuke Baoshan factory.
According to TSMC's preliminary plan, the plant is expected to obtain land permits and conduct environmental impact assessments next year, starting construction as soon as 2023, and is expected to create about 8,000 jobs.
Source: Economic Daily
In the past two years, due to the sharp increase in demand for chips, TSMC's capacity expansion and development can be said to be "five times faster" than in previous years. In order to ensure the increase in production capacity, the related expenditures have also been significantly increased, especially in advanced processes.
At present, TSMC's process in Zhongke covers 28nm and 7nm, and since the equipment of the 2nm and 1nm processes can be shared, the future will be gradually promoted from 1.8nm and 1.4nm to 1nm.
The industry speculates that TSMC 2nm can be trial production in 2024 at the earliest, achieve mass production in 2025, and then enter 1nm, and then enter the "Amy" process.
After the completion of the plant, the annual electricity consumption is expected to reach 750,000 kilowatts, and the annual power generation capacity of a local generating unit is 550,000 kilowatts.
In other words, almost 1.5 units are needed to ensure the electricity demand of TSMC's new plant throughout the year. At present, there are only 10 generator sets in total.
2nm：MBCFET
FinFETs (fin field effect transistors) were good until the process dropped to 5nm.
When the atomic level is reached (3nm is 25 silicon atoms lined up in a row), finFETs begin to leak and may no longer be suitable for further process levels.
On the 2nm process, TSMC did not directly use the GAAFET (orbiting gate field effect transistor), or nanowire, that Samsung planned to use on the 3nm process, but expanded it into MBCFETs (multi-bridge channel field effect transistors), that is, nanosheets.
A GAAFET is a FET surrounded by gates. Depending on the design, the full gate FET can have two or four active gates.
By applying a voltage to the gate, you can control the current between the source and drain, switch it from 0 to 1, and create a processor's binary logic.
From GAAFET to MBCFET, from nm line to NM chip, it can be regarded as a leap from two-dimensional to three-dimensional, which can greatly improve circuit control and reduce leakage rate.
2nm adopts the MBCFET architecture based on the orbit gate (GAA) process, which can solve the physical limit of the FinFET due to process shrinkage and leakage of current control.
1nm: "Bismuth" secret weapon
In May, an international joint research team led by Professor Jing Kong of the Massachusetts Institute of Technology (MIT) explored a new direction: using bismuth (Bi), an atomic-thin material, instead of silicon, to effectively connect these 2D materials to other chip components.
The study, "Ultralow contact resistance between semimetal and monolayer semiconductors," was published in the journal Nature.
Since 2019, MIT, NTU and TSMC have embarked on a long period of cross-border cooperation.
The MIT team was the first to find that pairing a "semi-metallic bismuth (Bi)" electrode on a "two-dimensional material" can greatly reduce the resistance and increase the transmission current.
Subsequently, TSMC's Technical Research Department optimized the "Bismuth (Bi) Deposition Process".
Finally, the NTU team successfully reduced the component channel to nm size using the "Helium Ion Beam Microscopy System", and finally obtained a breakthrough research result.
This material is used as a contact electrode for two-dimensional materials, which can greatly reduce the resistance and increase the current, so that its energy efficiency is the same as silicon, enabling a new process of future semiconductor 1nm processes.
In the future, "atomic-scale" thin materials are a promising alternative to silicon-based transistors.
The researchers say they solved one of the biggest problems with the miniaturization of semiconductor devices, the contact resistance between metal electrodes and single-layer semiconductor materials, a solution that proved very simple.
That is, a semi-metal, bismuth (Bi), is used to replace ordinary metal and connect with a single layer of material.
This ultra-thin monolayer material, in this case molybdenum disulfide, is considered a major contender to bypass the miniaturization limitations now encountered by silicon-based transistor technology.
The interface between metals and semiconductor materials, including these monolayer semiconductors, creates a state phenomenon called metal-induced gap (MIGS), which leads to the formation of a Schottky barrier, which inhibits the flow of charge carriers.
Using a semi-metal whose electronic properties are between metal and semiconductor, coupled with the appropriate energy arrangement between the two materials, the result is that this problem is eliminated.
With this technology, the researchers demonstrated miniaturized transistors with extraordinary performance, meeting the requirements of the roadmap for future transistor and microchip technology.
Resources:
https://udn.com/news/story/7240/5992392