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According to the news of Duke University's official website, Professor Chen Yiran of Duke University's Department of Electrical and Computer Engineering won the 2022 Edward J. McCluskey Technical Achievement Award.
Established in 1985 by the International Institute of Electrical and Electronics Engineers (IEEE) Computer Society, the award recognizes scholars worldwide who have made outstanding and innovative contributions in the fields of computer and information science and engineering.
Professor Chen Yiran was awarded the prize for his research on new non-volatile memory (NVM) technologies and their applications, and his research has led to important advances in this field. His team focuses on novel memory and storage systems, machine learning and neuromimetic computing, and mobile computing systems.
This is the fourth consecutive year that a Chinese scholar has received this award. Previously, Guo Zongjie, a professor at the University of Southern California, and Zhou Zhihua, a professor of computer science and artificial intelligence at Nanjing University, won the 2019 Edward J. McCluskey Technical Achievement Award. Xie Yuan, chief scientist of Alibaba Pingtouge, and Tao Dacheng, president of the JD.com Exploration Research Institute and academician of the Australian Academy of Sciences, have won the technical achievement awards in 2020 and 2021 respectively.
At Duke University, Chen is a professor in the Department of Electrical and Computer Engineering at Duke University, director of the National Science Foundation (NSF) Institute for Next-Generation Mobile Networks and Edge Computing Artificial Intelligence (Athena), director of the National Science Foundation (NSF) Center for New and Sustainable Computing (ASIC) School-Enterprise Collaborative Research (IUCRC), and co-director of the Center for Computational Evolutionary Intelligence at Duke University.
Yiran Chen is a 1994 undergraduate student in the Department of Electronics of Tsinghua University, who received his master's degree from Tsinghua University in 2001 and his Ph.D. from Purdue University in 2005. After five years in industry, he joined the University of Pittsburgh as an assistant professor in 2010 and was promoted to Associate Professor and Bicentennial Alumni Chair in 2014.
He has published 1 monograph, published nearly 500 academic papers, obtained 96 patents, served as the editor of dozens of international academic journals, served on the technical and organizational committees of more than 60 international academic conferences, and is currently the editor-in-chief of the IEEE Journal of Circuits and Systems.
In well-known international academic conferences and seminars such as MICRO, KDD, DATE, SEC, etc., he has won 8 Best Paper Awards, 1 Best Poster Award, and 14 Best Paper Nominations.
Professor Chen has received several awards for his contributions to the academic community, such as the Edward J. McCluskey Technical Achievement Award of the IEEE Computer Society and the ACM Design Automation Organization (SIGDA) Service Award. He is a Fellow of ACM and IEEE and chairs the ACM Design Automation Organization (SIGDA).
One of his most representative works is the study of spin transfer torque random access memory (STT-RAM). His paper on the prototype chip of STT-RAM, published during his tenure at Seagate, demonstrated for the first time the feasibility of manufacturing STT-RAM in commercial semiconductor processes.
He also proposed the first STT-RAM storage unit model for magnetic/electrical co-design and the application of STT-RAM as an embedded on-chip memory in computer architectures. STT-RAM has been commercially available in semiconductor manufacturers such as Samsung, GROFOUNDRIES, and TSMC in recent years, and has appeared in many consumer electronics.
Professor Chen Yiran is also a pioneer in the field of neural network acceleration using non-volatile memory. In 2009, together with colleagues at Seagate, he first proposed a model for simulating neurons using spin memory resistors. The viability of this idea was confirmed by many related work that followed.
Together with his wife, Professor Li Hai, he proposed a mapping method for calculating matrix vector multiplication using memristem remembrance matrix, achieving the highest computational density that can theoretically be achieved by the current planar semiconductor manufacturing technology. This design idea has also been adopted by HP, IBM and other companies, and has directly promoted the establishment of many related fields of start-ups.
In February 2021, Professor Chen Yiran led the establishment of pingxin technology, a memory-saving integrated AI chip company. The startup received nearly $10 million in Pre-A round of funding in August of the same year, led by Red Dot China, followed by Zhen Fund and Sequoia China.
Yang Yue, founder and CEO of Pingxin Technology, graduated from the Department of Automation of Tsinghua University, received his Ph.D. in the Department of Computer Engineering of the University of Toronto, and served as the chief system architect of Micron Technology in Silicon Valley, California, usa, and has accumulated technology and industry experience in the research directions of memory chips, artificial intelligence and related fields.
Among the other two co-founders, Zhang Yaojun graduated from Shanghai Jiao Tong University with a bachelor's degree, and later obtained a doctorate degree from the Department of Electronic Engineering of the University of Pittsburgh, and was deeply involved in the new memory research and development industry in the early stage, designing and developing a variety of COMMERCIAL MRAM chips, with more than ten key patents; Xu Zhenlong graduated from Hsinchu Tsinghua University, worked for TSMC for many years, has more than 20 years of chip design experience, and has led the team to successfully deliver a variety of mass production chips.
In September 2021, AppleChip Announced that the world's first commercially available in-memory computing accelerator based on the SRAM architecture, the S200, has been successfully tested, and said that this accelerator brings industrial-grade memory computing into the 28nm era for the first time.
It is reported that the research group of Researcher Yan Bonan of the Institute of Artificial Intelligence/School of Integrated Circuits of Peking University participated in the joint research and development design and packaging and testing of this in-memory computing AI computing acceleration scheme. The test chip using S200 can achieve an energy efficiency ratio of 27.38 TOPS/W INT8 with/without signed data types, and its storage density is also ahead of other global functional samples in the field of SRAM memory computing.
In contrast, most of the world's accelerator test results based on the same criteria typically range from 2-3TOPS/W.
Based on the in-memory computing (PIM) architecture, this accelerator can complete the dominant basic operations in deep learning algorithms inside memory, thereby greatly improving computational efficiency. Apple Core Technology said that the accelerator can complete the operation without loss of precision.
Source: Duke University website and public information