armv8中開啟或關閉mmu對記憶體和指令的影響

開啟/關閉mmu後通路的情況

D5.2.9 The effects of disabling a stage of address translation

All other accesses

For all other accesses, when stage 1 address translation is disabled, the assigned attributes depend

on whether the access is a data access or an instruction access, as follows:

• Data access

The stage 1 translation assigns the Device-nGnRnE memory type.(沒有關閉MMU之前，記憶體通路是normal類型，關閉mmu後，記憶體通路變成了裝置類型的)

• Instruction access

The stage 1 translation assigns the Normal memory attribute, with the cacheability and

shareability attributes determined by the value of the SCTLR_ELx.I bit for the

translation regime, as follows:

When the value of I is 0

The stage 1 translation assigns the Non-cacheable and Outer Shareable

attributes.

When the value of I is 1

The stage 1 translation assigns the Cacheable, Inner Write-Through

Read-Allocate No Write-Allocate, Outer Write-Through Read-Allocate No

Write-Allocate Outer Shareable attribute.

指令通路依賴于SCTLR.I域

I位為0，表示non-cacheable和outer shareable通路

I位為1，表示cacheable通路。

在開啟mmu後可以通路未對齊的指令，但是沒有開啟mmu的時候，通路沒有對齊的指令可能會導緻cpu直接挂了。