最近在做嵌入式的開發，調試的是一塊搭載了AM3359、AM4379以及Cyclone10三個CPU的闆子。三者的通訊主要是通過GPMC總線來實作，資料存儲在一塊大小為256KB的SRAM中，資料互動則通過Cyclone10這塊FPGA上的雙口RAM來實作。其中，AM3359這塊CPU上運作了linux-rt-4.4.32實時核心。在這裡，記錄了GPMC調試的一些問題以及基礎知識，友善後續的查閱。
一、GPMC簡介
GPMC：General-purpose Memory Controller （通用存儲器控制器）
特點：
1.靈活的 8 位和 16 位異步存儲器接口
2.具有多達7個片選
3.支援NAND、NOR、複用NOR和SRAM
4.最大支援512MB的片外存儲器連續位址空間的通路
二、GPMC與存儲器的連接配接
1.與16位的位址資料複用存儲器連接配接：
2.與16位的非複用存儲器連接配接：
3.與8位的NAND FLASH連接配接：
三、7個配置寄存器的定義
1、配置裝置類型 GPMC_CONFIG1
2、配置通路時序，主要讀寫時序 GPMC_CONFIG2~6
3、配置基位址、容量（即掩碼位址）、使能CS信号 GPMC_CONFIG7
四、片選位址區域的劃分
片選位址區域的劃分主要由GPMC_CONFIG7_i[11-8]來确定目前片選位址空間的大小，GPMC_CONFIG7_i [6]控制片選引腳， GPMC_CONFIG7_i [5-0]确定目前片選的起始位址。
疑問：上圖中的位址空間配置是怎樣的，cpu如何選中裝置？
Mask address 最小16M ，位址空間的跨度為0 ~ 0x00FF FFFF（低24位）。
Base address 由位址線的高8位決定，這個位址與目前的片選相關聯。
例子：
GPMC_CONFIG7_0： 基位址規劃為0x08，大小劃歸為16MB（0x00FF FFFF）
起始位址：0x0800 0000
結束位址： 0x08FF FFFF
GPMC_CONFIG7_2： 基位址規劃為0x0A，大小規劃為128MB（0x07FF FFFF）
起始位址：0x0A00 0000，
結束位址為0x0A00 0000 + 0x07FF FFFF=0x11FF FFFF
CPU通路設定好的位址範圍，對應的片選引腳就會被拉低，進而選中裝置
五、裝置樹的配置
linux核心有關gpmc的講解可參考核心目錄的下列檔案：
(1)linux-rt-4.4.32/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
(2)linux-rt-4.4.32/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
(3)linux-rt-4.4.32/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
這些官方說明文檔會針對裝置節點的參數做一個比較詳細的解釋。
下面列舉一下已經調試好的裝置樹代碼：
1.NAND flash裝置樹的配置
調試的闆子上使用的是一個8位的nandflash，型号為S34ML04G2，512MB。
①引腳配置
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x800, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad0.gpmc_ad0 */
AM33XX_IOPAD(0x804, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad1.gpmc_ad1 */
AM33XX_IOPAD(0x808, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad2.gpmc_ad2 */
AM33XX_IOPAD(0x80c, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad3.gpmc_ad3 */
AM33XX_IOPAD(0x810, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad4.gpmc_ad4 */
AM33XX_IOPAD(0x814, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad5.gpmc_ad5 */
AM33XX_IOPAD(0x818, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad6.gpmc_ad6 */
AM33XX_IOPAD(0x81c, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_ad7.gpmc_ad7 */
AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_wait0.gpmc_wait0 */
AM33XX_IOPAD(0x87c, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_csn0.gpmc_csn0 */
AM33XX_IOPAD(0x890, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_advn_ale.gpmc_advn_ale */
AM33XX_IOPAD(0x894, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_oen_ren.gpmc_oen_ren */
AM33XX_IOPAD(0x898, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_wen.gpmc_wen */
AM33XX_IOPAD(0x89c, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
②增加GPMC結點
&gpmc {
/* When enabling GPMC, disable eMMC */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
...
}
③在GPMC節點下添加NAND節點
（1）配置NAND的片選引腳、Base address 和Mask address。
（2）配置NAND的各項參數。
（3）分區。
&gpmc {
/* When enabling GPMC, disable eMMC */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
[email protected],0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
[email protected] {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
[email protected] {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
[email protected] {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
[email protected] {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
[email protected] {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
[email protected] {
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
[email protected] {
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
[email protected] {
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
};
[email protected] {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
[email protected] {
label = "NAND.file-system";
reg = <0x00A00000 0x1F600000>;
};
};
};
2.NOR flash/SRAM裝置樹的配置
調試的闆子上使用的SRAM是IS61LV25616AL這個型号，有18根位址線，16根資料線。連接配接的方式為AD複用模式（Address/Data-Multiplexed）。SRAM的通路方式和NOR是一緻的，是以配置方法也是一樣。
①引腳配置
sram_x16_default: sram_x16_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x800, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad0.gpmc_ad0*/
AM33XX_IOPAD(0x804, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad1.gpmc_ad1*/
AM33XX_IOPAD(0x808, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad2.gpmc_ad2*/
AM33XX_IOPAD(0x80c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad3.gpmc_ad3*/
AM33XX_IOPAD(0x810, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad4.gpmc_ad4*/
AM33XX_IOPAD(0x814, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad5.gpmc_ad5*/
AM33XX_IOPAD(0x818, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad6.gpmc_ad6*/
AM33XX_IOPAD(0x81c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad7.gpmc_ad7*/
AM33XX_IOPAD(0x820, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad8.gpmc_ad8*/
AM33XX_IOPAD(0x824, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad9.gpmc_ad9*/
AM33XX_IOPAD(0x828, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad10.gpmc_ad10*/
AM33XX_IOPAD(0x82c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad11.gpmc_ad11*/
AM33XX_IOPAD(0x830, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad12.gpmc_ad12*/
AM33XX_IOPAD(0x834, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad13.gpmc_ad13*/
AM33XX_IOPAD(0x838, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad14.gpmc_ad14*/
AM33XX_IOPAD(0x83c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* gpmc_ad15.gpmc_ad15*/
AM33XX_IOPAD(0x8e0, (PIN_INPUT_PULLUP | MUX_MODE2)) /*gpmc_a1.gpmc_a1(a16)*/
AM33XX_IOPAD(0x8e4, (PIN_INPUT_PULLUP | MUX_MODE2)) /*gpmc_a2.gpmc_a2(a17)*/
AM33XX_IOPAD(0x8b8, (PIN_INPUT_PULLUP | MUX_MODE1)) /*gpmc_a6.gpmc_a6(a21)*/
AM33XX_IOPAD(0x8bc, (PIN_INPUT_PULLUP | MUX_MODE1)) /*gpmc_a7.gpmc_a7(a22)*/
AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_wait0.gpmc_wait0*/
AM33XX_IOPAD(0x87c, (PIN_OUTPUT | MUX_MODE0)) /* gpmc_csn0.gpmc_csn0 */
AM33XX_IOPAD(0x880, (PIN_OUTPUT | MUX_MODE0)) /* gpmc_csn1.gpmc_csn1 */
AM33XX_IOPAD(0x884, (PIN_OUTPUT | MUX_MODE0)) /* gpmc_csn2.gpmc_csn2 */
AM33XX_IOPAD(0x890, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_advn_ale.gpmc_advn_ale*/
AM33XX_IOPAD(0x894, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_oen_ren.gpmc_oen_ren*/
AM33XX_IOPAD(0x898, (PIN_OUTPUT | MUX_MODE0)) /* gpmc_wen.gpmc_wen */
AM33XX_IOPAD(0x89c, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_be0n_cle.gpmc_be0n_cle*/
>;
};
②增加GPMC節點
&gpmc {
/* When enabling GPMC, disable eMMC */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = </*&nandflash_pins_s0*/ &sram_x16_default>;
ranges = <0 0 0x08000000 0x01000000>, /* CS0 nand. Min partition = 16MB */
<1 0 0x01000000 0x01000000>, /* CS1 sram. Min partition = 16MB */
<2 0 0x02000000 0x01000000>; /* CS2 fpga. Min partition = 16MB */
...
}
③在GPMC節點下添加NOR節點
（1）配置NOR的片選引腳、Base address 和Mask address。
（2）配置NOR的各項參數。
（3）分區。(不是必須的)
[email protected],0 {
compatible = "cfi-flash";
linux,mtd-name= "intel,pf48f6000m0y1be";
#address-cells = <1>;
#size-cells = <1>;
reg = <1 0 0x01000000>;
bank-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <279>;
gpmc,cs-wr-off-ns = <279>;
gpmc,adv-on-ns = <18>;
gpmc,adv-rd-off-ns = <72>;
gpmc,adv-wr-off-ns = <72>;
gpmc,oe-on-ns = <81>;
gpmc,oe-off-ns = <252>;
gpmc,we-on-ns = <81>;
gpmc,we-off-ns = <252>;
gpmc,rd-cycle-ns = <279>;
gpmc,wr-cycle-ns = <279>;
gpmc,access-ns = <171>;
gpmc,wr-data-mux-bus-ns = <135>;
gpmc,wr-access-ns = <279>;
};
[email protected],0 {
compatible = "cfi-flash";
linux,mtd-name= "intel,pf48f6000m0y1be";
reg = <2 0 0x01000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
};
上面這裡是設定了兩個節點，一個是sram，一個是fpga，分别對應片選1和片選2。
六、注意事項
1.片選0在系統上電或者複位之後，自動會變為使能狀态（低電平）。
Chip-select 0 is the only chip-select region enabled after either a power-up or a GPMC reset.
2.在設定sram或者nor的時候，需注意：
To select an address/data-multiplexed device, program the following register fields:
• GPMC_CONFIG1_i[11-10] DEVICETYPE field = 00
• GPMC_CONFIG1_i[9-8] MUXADDDATA bit = 10b
3. 掩碼位址應該避免0010 和1001這兩個值。
A mask value of 0010 or 1001 must be avoided because it will create holes in the chip-select address space.
4.檢視AM335X的資料手冊，會發現GPMC在與外部的16位位址資料複用存儲器連接配接時，位址線錯開了一位來連接配接：
這是由于AM335X的内部儲存結構是以位元組為機關的，但外部儲存器的結構是以字為機關的。
CPU位址 16位存儲器的位址
0x00,0x01 0x00（0x1234）（此位址對應一個16bit的資料）
0x02,0x03 0x01（0x5678）
0x04,0x05 0x02（0xabcd）
CPU位址線 16位存儲器的位址
A0 x
A1 A0
A2 A1
A3 A2
… …
最近在做嵌入式的開發，調試的是一塊搭載了AM3359、AM4379以及Cyclone10三個CPU的闆子。三者的通訊主要是通過GPMC總線來實作，資料存儲在一塊大小為256KB的SRAM中，資料互動則通過Cyclone10這塊FPGA上的雙口RAM來實作。其中，AM3359這塊CPU上運作了linux-rt-4.4.32實時核心。在這裡，記錄了GPMC調試的一些問題以及基礎知識，友善後續的查閱。