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Tsinghua University: Development of 10kV high-voltage SiC GTO module

author:Wide Band Gap Alliance

Source: Proceedings of the CSEE

Authors:LI Xianbing1,YANG Tongtong1,YAO Peng1,ZHONG Zhiyu1,YUE Ruifeng1,WANG Yan1,HAN Ronggang2,WANG Liang2(1.School of Integrated Circuits, Tsinghua University; 2. State Grid Smart Grid Research Institute Co., Ltd.)

Abstract:In this paper, a solder-type module based on a self-designed 10kV silicon carbide (SiC) gate pole can be turned off thyristor (GTO) monolithically packaged with a size of 8mm  8mm. The design and manufacturing process of the 10kV SiC GTO module is introduced in detail, and the leakage current of the module under 10.5kV blocking voltage is compared with that of the packaged module, the redundancy of the module insulation design and the packaging process are verified, and the dynamic, static, ultimate overcurrent capability, shutdown gain and other properties of the module are tested and preliminary test results are given.

Keywords: SiC; 10kV; SiC gates shut down thyristor modules; switching time; Extreme flow

0 Introduction

The first generation of power electronics dominates the next generation of power electronics technology, and the main means of reducing the system cost and device loss of power electronic devices is to hope for power semiconductor devices with better characteristics: higher blocking voltage, lower on-voltage drop, and faster turn-on and turn-off conversion times and dv/dt and di/dt tolerance [1]. For example, high-voltage IGBT modules have to adopt large-scale chip parallel technology, and high-voltage power transmission has to connect more modules in series and parallel, making the system more complex, increasing losses, reducing reliability, and increasing costs [2-3].

Compared with traditional silicon materials, silicon carbide (SiC) has become the preferred material for the third generation of wide bandgap power semiconductor devices in recent years due to its excellent comprehensive physical properties such as 3 times the bandwidth of silicon, 10 times the critical breakdown field strength of silicon, 2.2 times the saturated carrier mobility, and 3 times the thermal conductivity [4]. SiC semiconductor devices are in the low voltage range of 650~1700V, mainly for industrial and consumer scenarios such as new energy, electric vehicles, and charging power supplies, and the single power of such devices is small and the number is large [5]; In terms of high voltage, the main application research hotspots in recent years are in the fields of grid solid-state transformers, high-voltage circuit breakers, locomotive traction, industrial frequency conversion and high-voltage pulse power supplies, and the voltage level of devices is developing to 10, 20 or even 30 kV, and most of the current levels are required to be at the level of 100 amperes, 1000 amperes, or even tens of thousands of amperes for ultra-high voltage transmission [6-10].

With the development of high-quality, large-size SiC substrates and multi-layer thick epitaxial wafer preparation technology, high-voltage SiC devices have made great progress internationally, especially in terms of blocking voltage, the University of North Carolina and Cree in the United States have successively reported SiC MOSFETs with blocking voltages exceeding 6.5, 10, and 15kV [11-12]; Bipolar devices above 20kV have successively realized 7~39kV PIN diodes [13-14]; In 2015, the voltage and current of SiC IGBTs have been increased to 27.5 kV/20 A [15]. In 2013, CREE increased the SiC p-GTO to 20kV[16], and in 2019, 15kV SiC n-GTO was reported[17]; In 2017, a 22kV SiC gate can turn off thyristor (ETO) p-ETO [18].

In China, SiC N-channel IGBTs with a blocking voltage of 12 kV were reported in 2018 [19], and in 2020, SiC MOSFETs with blocking voltages of 6.5, 10, and 15 kV were reported [20-21]. In 2021, they developed a 6500V/400A full SiC MOSFET module and an 18kV/12.5ASiC IGBT chip, and packaged an 18kV/125A SiC IGBT crimp module [22].

In 2018, Tsinghua University achieved the first 10kV SiC p-GTO in China[23], which showed good dynamic and static performance, with a chip size of only 1.6mm  1.6mm and no packaging. In February 2022, a chip size of 5mm  5mm and a blocking voltage of 12.5 kV SiC p-GTO were realized[24]. Although it can be seen that other domestic units are also carrying out research on high-voltage silicon carbide GTO, most of them focus on the simulation of devices and high-voltage terminals [25-27].

Compared with 6.5kV silicon IGBTs, SiC GTOs with voltage levels of 10kV and above have low leakage current, high junction temperature, high switching frequency and overcurrent capability. Although SiC IGBTs of the same voltage level have also made great progress, due to the reliability of the gate oxygen layer, their operating junction temperature is still limited to 150°C, while SiC GTO is not limited by the reliability of grid oxygen and can operate at a higher junction temperature, thus simplifying the heat dissipation system. At the same time, compared with SiC MOSFETs and IGBTs, it has lower on-state voltage and lower on-state loss, which has potential technical advantages in the fields of solid-state transformers for smart grids, DC circuit breakers, pulsed power supplies, and spacecraft [28-29].

Continental has a large gap with the United States, Japan and Europe in terms of SiC substrates and device manufacturing processes. Therefore, it will take time for the large-scale production of gate control devices that require gate oxygen process, and it is more difficult to realize UHV devices manufactured with multi-layer and thick epitaxial layer SiC wafers for 10kV and above, which has become the main technical bottleneck restricting the development of high-voltage and high-power silicon carbide devices in mainland China. 10kV SiC GTO devices are current control devices that avoid the immature gate oxygen process and the limitation of gate oxygen reliability within 150°C for silicon carbide devices [30], and this current control device is most likely to achieve higher junction operating temperatures, so it is likely to be the first high-voltage device to achieve large-scale mass production and put into use [31]. Due to the lack of free supply of high-voltage chips above 10kV in China, both scientific research institutions and universities are still in the initial stage of exploration in the research of packaging technology of high-voltage modules above 10kV, especially the research on high-voltage silicon carbide devices with high-speed switching, high junction temperature, high current density and high heating density.

In this paper, based on the self-developed silicon carbide GTO device [24], a single-chip high-voltage SiC GTO soldered packaging module with a blocking voltage greater than 10kV and a chip size of 8mm 8mm is reported, and the basic performance of the module is preliminarily tested.

1 10kV SiC GTO 模块封装

According to the test of the 10kV SiC GTO high-voltage chip independently developed by our research group and the performance of the single-chip packaging module, the module design was carried out in detail, and the insulation, heat dissipation, electrical structure, parasitic parameters, mechanical structure and module reliability were mainly carried out. In this paper, the main design technical parameters and electrical performance test results of the module are introduced, and the high-voltage insulation design and insulation process of the module are also verified.

The module package uses a 10kV SiC GTO chip with a size of 8mm  8mm, and the electrical layout and dimensions of the chip and double-sided ceramic copper clad laminate are shown in Figure 1.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

The module adopts the thermal design of a mature soldered module, with a junction temperature of 175°C and a case temperature of 80°C. Considering that the soldered packaging chip is single-sided heat dissipation, and there is no problem of concentrated heat distribution of multi-chip parallel chips, the module adopts a high thermal conductivity aluminum nitride ceramic copper clad laminate to realize the electrical connection, insulation and heat dissipation structure, and the substrate adopts a 4mm thin nickel-plated copper plate pre-bending and anti-deformation structure to correct the middle arch caused by soldering thermal stress and reduce the heat dissipation distance, so as to meet the packaging requirements of a single-chip low-current module.

The ceramic copper clad laminate is aluminum nitride direct bonging copper (DBC), the surface is electroplated with nickel and passivated to improve solderability, the specific size is shown in Figure 1, and the chip pad part size is 8.2mm  18mm, leaving room for subsequent dual-chip parallel packaging. DBC electrical connection terminal gap is reserved for 2mm width, poured with silicone gel or silicone rubber (insulation withstand voltage 24kV/mm), according to the 15kV insulation condition at least twice the insulation redundancy. The copper clad laminate is 2.5mm away from the edge of aluminum nitride, the metal on the back of aluminum nitride is 2.5mm away from the edge, and the design insulation width is 5mm to give the insulation risk caused by sufficient solder overflow distance, and the effective insulation distance after potting the silicone gel is not less than 3mm. The size of the base plate is 48mm, 80mm, 4mm, and the silicon carbide aluminum plate or copper plate is used as the substrate, of which the silicon carbide aluminum plate is used for the subsequent high-temperature performance test, and the copper bottom plate is used for this routine performance test.

The insulated tube shell is designed according to the Class II pollution standard specified in the national standard GB/T 16935.1-2008 "Insulation Coordination of Equipment in Low-voltage Systems Part 1 Principles, Requirements and Tests", and the electrical clearance insulation distance is 30mm at an altitude of 2000 meters above sea level and 12.7kV under the condition of AC non-uniform electric field. The minimum creepage distance shall not be less than 71mm under the first category of pollution, and the creepage distance shall not be less than 63mm under the second category of pollution. Due to the coordination requirements between the outer insulation of the module and the length of the lead terminals, in order to reduce the parasitic inductance brought by the terminals as much as possible, the length of the terminals should be shortened as much as possible without affecting the creepage distance of the external insulation of the module, and the creepage design distance of the outer insulating umbrella skirt is 76.5mm, and the creepage distance between the terminals is 71mm. The inner insulation is made of potting silicone gel or 300°C high-temperature silicone rubber, and the amount of glue can completely block the discharge along the surface between the terminals inside the module. The terminal height is 19.5mm, the insulated tube housing height is 23mm, the total thickness of the module is 27mm, the terminal length is compressed as much as possible to the maximum height allowed by the packaging process, and the overall module size is 80mm, 52mm, and 27mm. The design principle of the module package is shown in Figure 2(a) and (b), and Figure 2(c) is the physical drawing. The module package adopts the brazing and soldering process, the chip is brazed with 295°C tin-lead high-temperature soft brazing, and the terminals, DBC and the bottom plate are soldered with 220°C tin-silver low-temperature soft brazing. The shell is made of polyetheretherketone (PEEK) material that can withstand high temperature of 300°C, and is bonded with adhesive that can withstand a temperature of 250°C for a long time, and then potted and degassed in two times. The first amount of glue filling covers the bonding line, and the vacuum degassing of 1~10Pa is 15min; The second amount of glue is submerged in the cathode and anode terminal separation wall, and the exhaust space is reserved to ensure smooth degassing, and then degassing at 1~10Pa vacuum for 15min; The silicone gel curing process cures according to the temperature required by the selected model.

Tsinghua University: Development of 10kV high-voltage SiC GTO module
Tsinghua University: Development of 10kV high-voltage SiC GTO module

In this paper, the leakage of the same chip before and after packaging at 10.5kV is compared and tested to detect the external and internal insulation of the module package. The test results show that the 10.5kV chip with a leakage current of 0.5A does not change significantly before and after the leakage current is packaged into a module. It shows that there is no leakage current in the internal and external insulation of the module, and the insulation design has sufficient redundancy.

2 10kV SiC GTO 模块的静态特性

Tsinghua University: Development of 10kV high-voltage SiC GTO module

In order to test the forward blocking performance of a 10kV SiC GTO module, a blocking test device is built, which is mainly composed of an adjustable HVDC source, a current limiting resistor, an ammeter, an oscilloscope, and a device under test. Among them, the adjustable high-voltage DC source is a 220V voltage regulator connected to a step-up transformer, and then the bridge rectification and capacitor filtering are carried out, the test circuit principle is shown in Figure 3, and the blocked test circuit is built in Figure 4.

Tsinghua University: Development of 10kV high-voltage SiC GTO module
Tsinghua University: Development of 10kV high-voltage SiC GTO module

The gate of the module is grounded, and the cathode is added with a negative 10.5kV voltage to test the leakage current of the module. Table 1 shows the leakage current of a group of modules under the condition of blocking voltage of 10.5kV, and the test results show that the leakage current of the developed silicon carbide GTO modules is less than 40A. Due to the unevenness of the chip epitaxial wafer and the process, the chip leakage current is still highly dispersed. With manual intermittent data acquisition, Figure 5 shows the forward blocking curve for a module with a serial number ending in 50 at every 2 kV recording point.

Tsinghua University: Development of 10kV high-voltage SiC GTO module
Tsinghua University: Development of 10kV high-voltage SiC GTO module

The forward conduction characteristics of the 10kV SiC GTO module were tested using the power semiconductor device static parameter test and analysis system model PST6747A (see Figure 6) from PONOVO, which has excellent wide voltage and current measurement capabilities. With a pulse test current width of 200s and a pulse interval of 800s, a typical forward conduction characteristic curve as shown in Figure 7 was obtained under the condition of no heat dissipation and current limit of 40A. As can be seen from the graph, the forward conduction voltage drop of the device is 5.7V at a forward conduction current of 40A at room temperature.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

3 10kV SiC GTO 模块的动态特性

Tsinghua University: Development of 10kV high-voltage SiC GTO module

In order to test the dynamic characteristics of the 10kV SiC GTO, a circuit diagram shown in Figure 8 was used, and the test circuit was built in Figure 9.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

In this experiment, a set of typical turn-on and turn-off waveforms of the DUT are obtained by controlling the direction of the gate current IG to control the turn-on and turn-off of the 10kV SiC GTO module by controlling the direction of the positive and negative currents of the 15~10V voltage source, and manually turning on the pulse trigger signal of the voltage source, as shown in Figs. 10 and 11, respectively.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

Figure 10 shows a typical turn-on waveform for a set of 1000V bus voltages of a 10kV SiC GTO module with a 5A current, due to the parasitic inductance in the circuit, the IG has current fluctuations, and the IAK also has a fluctuation; As the IG gradually stabilizes, the cathode current IAK gradually rises to 5A, the bus voltage VAK decreases rapidly, and stabilizes to the on-state conduction voltage drop after a short oscillation, and the GTO module transitions from the forward blocking state to the forward conduction state. As can be seen from Figure 10, the rise time is about 1.45s (10%~90% of the maximum). The calculated di/dt is about 3.44 A/s and the voltage rate of change dV/dt is about 14.3 kV/s.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

Figure 11 shows a typical turn-off waveform of a 10kV SiC GTO module at a 1000V bus voltage. After the IG rises from 0 to 5A, the IAK begins to decrease slowly, the shutdown process begins, and the bus voltage VAK gradually increases. When the IAK drops to about 1.6A, the VAK rises to close to the bus voltage of 1000V, the GTO module transitions from the forward turn-on state to the forward blocking state, the IAK drops to 0A, and the shutdown process ends.

As can be seen from Figure 11, the current drop time of the module is about 4.73s, the calculated di/dt is about 1A/s, the voltage change rate dV/dt is about 211V/s, and the shutdown trailing time of the module is longer than that of the turn-on process.

4 10kV SiC GTO 模块的关断增益

The shutdown-gain test circuit for a silicon carbide GTO is similar to Figure 6. For testing, set the anode and cathode voltages to 70V and the current-limiting resistance to 100. The turn-off gain of the SiC GTO is calculated by dividing the current between the anode and cathode IAK at turn-off by the gate current IGA.

Tsinghua University: Development of 10kV high-voltage SiC GTO module

Figure 12 shows a waveform plot of the module's turn-off gain test, calculated from the measured current IAK between the anode and cathode and the gate current IGA, for a 10kV SiC GTO module with a turn-off gain of 2.53 at lower voltages.

5 10kV SiC GTO 模块极限通流能力

Tsinghua University: Development of 10kV high-voltage SiC GTO module

The pulsed overcurrent capability of the above modules was tested by using the static parameter test and analysis system of power semiconductor devices with model PST6747A shown in Figure 6. Limited by the test equipment's maximum test capability of 1500A, with a pulse width of 200s, the ultimate current of the module is tested to 1450A under the condition of no heat dissipation, where the on-voltage drop is increased to 15.8V, and after the subsequent equipment is upgraded and the module is cooled, it is expected to measure a larger limit pulse overcurrent, as shown in Figure 13.

6 Conclusion

In this paper, a SiC GTO single-chip package power module with a blocking voltage of 10kV and a chip area of 8  8mm manufactured by self-designed and tape-out is reported and its preliminary test results. When the module is tested at 10.5kV, the leakage current of the module is consistent with the leakage current of the chip, indicating that the outer and inner insulation of the module have no leakage, and the module package meets the design requirements. The dynamic and static performance tests of the module show that the developed 10kV SiC GTO module has superior static, dynamic and overcurrent resistance. The module is expected to be used in the early application research of high-voltage switches, pulse power supplies, frequency conversion devices, circuit breakers and solid-state transformers for distribution networks. At the same time, it also lays a certain foundation for the subsequent packaging of SiC GTO modules with current levels of 10kV/1000A and above.

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Source: Proceedings of the CSEE

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