IT Home reported on December 27 that with the outbreak of AI applications, the "memory wall" has become one of the main factors restricting the performance of computing systems. CXL is built on top of PCIe's physical and electrical interfaces, and CXL memory expansion enables additional memory capacity and bandwidth beyond the direct-attached DIMM slots in the server, supporting memory pooling and sharing to meet the computing power needs of high-performance CPUs/GPUs.
Recently, BIWIN announced that it has successfully developed a CXL DRAM memory expansion module that supports the CXL 2.0 specification.
BIWIN's CXL 2.0 DRAM adopts EDSFF (E3.S) form factor, with a memory capacity of up to 96GB, and supports PCIe 5.0×8 interface, with a theoretical bandwidth of up to 32GB/s. The backplane of the S-mount is directly connected to the server motherboard, expanding the memory capacity and bandwidth of the server. The attached specification table of IT Home is as follows:
In terms of latency performance, in the actual test, BIWIN's CXL 2.0 DRAM is mounted on node 2, and the CPU access latency mounted on node 0 is 247.1ns, and the bandwidth exceeds 21GB/s.
▲ Latency test
▲ Bandwidth test
BIWIN said that it can provide customers and partners with functional prototypes of 32GB~96GB CXL 2.0 DRAM for joint evaluation and testing.
At the same time, BIWIN can provide a non-E3. The server backplane of the S-interface provides CXL AIC riser cards.