Next-generation transistor architecture: The small lotus has shown sharp corners
Schematic diagram of CFET (Image source: imec)
At the just-concluded 2023 IEEE International Electron Devices Conference (IEDM2023), TSMC, Samsung, and Intel each showed off their cutting-edge technologies in the field of next-generation transistor structures. The transistor structure shown in the figure, called a Complementary Field Effect Transistor (CFET), is considered a key element of the sub-1nm process and is a next-generation transistor technology after FinFET and GAA. What different picture will it bring to the semiconductor industry?
Will CFET usher in a new era of 3D transistor architecture?
It is understood that the biggest difference between CFET and the previous transistor structure is the use of transistor vertical stacking structure, which may open a new era of three-dimensional transistor structure.
According to industry insiders, before the emergence of FinFET and GAA architectures, the chip transistor structure used planar MOSFETs, which can improve device performance and increase the number of devices on the chip by reducing the size of the device in equal proportions. However, when the channel length is less than a certain value, the gate's ability to control the channel will decrease, and the short channel effect will occur. In order to solve this problem, the industry has proposed two new transistor structures, FinFET and GAA. The former extends the channel upwards to form a three-dimensional structure, while the latter uses a gate around the channel to alleviate the problems of leakage in the shutdown state and the change of transistor threshold with gate length, and also enables the transistor to achieve better performance in a smaller space.
However, due to the transition of the transistor structure from planar to stereotype, it is difficult to continue to increase the density of on-chip devices by reducing the transistor size in equal proportions. With the continuous development of Moore's Law, the chip manufacturing process is getting closer and closer to the physical limit, in order to further increase the number of devices per unit area, the industry has begun to try to stack the original three-dimensional structure transistors, and proposed a CFET with a vertical stacking structure.
According to the latest data from TSMC, chips with CFET vertical stacking architecture can be up to 50% smaller in area than devices with Nanosheet (GAA) architecture.
Up to 50% smaller device area with CFET architecture (Image source: TSMC)
The three major companies collectively announced the technical progress related to CFET
Based on this, TSMC, Samsung, and Intel, the three leading players in advanced processes, are paying close attention to CFET-related technologies.
TSMC notes that CFET transistors are now being tested in TSMC labs for performance, efficiency, and density, and have achieved a gate spacing of 48nm. In addition, TSMC also introduced a unique design and manufacturing approach for CFET transistors: a dielectric layer is formed between the top and bottom devices to maintain their isolation, a design that can reduce leakage and power consumption. In order to further achieve better performance and higher levels of integration, TSMC has attempted to further isolate the alternating layers of silicon and silicon germanium in the nanosheets in its CFET transistor process. For example, TSMC removes silicon germanium material from nanosheets through a specific etching method, thereby freeing silicon nanowires. In order to further isolate the alternating layers of silicon and silicon germanium in the nanosheets, TSMC uses silicon germanium with an unusually high germanium content. This material is etched faster than other SiGe layers, so it is possible to construct an isolation layer before releasing the silicon nanowires.
TSMC added it in the latest architecture iteration introduction
CFET
Structure (Image source: TSMC)
Samsung refers to the CFET transistor structure as 3DSFET, and the current gate pitch is 45/48nm. In terms of technological innovation, Samsung has achieved effective galvanic isolation of the source and drain of stacked pFET (P-channel FET) and nFET (n-channel FET) devices. This isolation effectively reduces leakage currents and improves device performance and reliability. In addition, Samsung has significantly improved the yield of CFET devices in chips by replacing the etching step of wet chemicals with a new dry etching process.
Intel demonstrated a new technology that combines a CFET transistor structure with backside power supply technology, which enables a gate pitch of 60nm. Intel said that the innovation in CFET is that PMOS (P-type metal oxide semiconductor) and NMOS (N-type metal oxide semiconductor) are combined, so that the switching speed and driving ability are complementary, thereby improving the overall performance of the transistor. Combining PMOS and NMOS with their PowerVia rear power supply device contacts provides better control of current flow and improves power efficiency.
Intel CFET schematic diagram (Image source: Intel)
Although none of the three companies has disclosed which process node will use the transistor structure, public information shows that TSMC may use the CFET architecture in its A5 process that will be mass-produced in 2032.
TSMC may adopt CFET architecture in its A5 process for mass production in 2032 (Image source: imec)
Balancing cost and performance issues is key
The CFET structure is "emerging", allowing the industry to see the new development prospects of transistor structure. However, industry experts estimate that it will take 7~10 years for the CFET structure to be put into commercial use.
Why can't the three-dimensional transistor structure be used in the existing chip manufacturing process in a short period of time? Industry insiders told the "China Electronics News" reporter that the current CFET process needs to solve a large number of technical challenges brought by multi-layer stacking.
At present, the process path to be adopted for CFET is to grow the multilayer structure of PFET and NFET devices at one time, and then fabricate FETs on two epitaxial layers. This has dramatically increased the complexity of the process of device fabrication, and most of the process methods that worked well in FinFETs and GAA in the past are no longer applicable. Taking the FET source-drain module as an example, the ion implantation process can no longer be used to dop the source-drain, and the doped elements need to be brought to the vicinity of the source-drain area by impurities in online epitaxy, and then diffused to achieve doping. These changes require the development of new processes from scratch and the gradual maturity of them. There are many more such changes, and it takes a lot of and long-term process development to solve all the technical challenges that exist.
Among the new processes required for CFET, the problem of multi-layer stacking thermal annealing is one of the biggest challenges faced by CFET. It is understood that in the crystal growth and manufacturing process of semiconductor materials, structural defects such as defects, impurities, and dislocations will occur due to various reasons, resulting in incomplete crystal lattice and low conductivity after applying electric field. Through thermal annealing, the material can be repaired, the interior of the crystal can be rearranged, most of the defects and impurities can be removed, the crystal lattice integrity can be restored, and the conductivity and electrical properties can be improved.
Industry insiders said that semiconductor thermal annealing needs to be carried out at a high temperature of 1050 °C, and after the thermal annealing operation, it is also necessary to interconnect with metals such as copper and aluminum inside the chip. In conventional non-stacked transistor structures, only one thermal annealing is sufficient, whereas in stacked structures, one more thermal annealing is required for each stacked layer. In addition, many of the metal interconnect materials inside the chip are difficult to stabilize at temperatures of 1050°C. As a result, in the second layer transistor structure, the traditional method of integral thermal annealing is not possible, and a laser is required to partially anneal to effectively avoid the metal connection. The use of laser annealing will not only increase the difficulty of the process, but also increase the overall chip manufacturing cost due to the high cost of equipment.
"It's like writing with a brush, but now you have to write with a signature pen. The size of the words has not changed, but it needs to be drawn little by little with a pen. Therefore, chips with CFET structure need to solve the cost problem caused by thermal annealing with laser before the pace of commercial use can be accelerated. The person told the "China Electronics News" reporter.
.data_color_scheme_dark{--weui-ORANGERED: #ff6146;--weui-BG-0: #111;--weui-BG-1: #1e1e1e;--weui-BG-2: #191919;--weui-BG-3: #202020;--weui-BG-4: #404040;--weui-BG-5: #2c2c2c;--weui-FG-0: rgba(255, 255, 255, .8);--weui-FG-HALF: rgba(255, 255, 255, .6);--weui-FG-1: rgba(255, 255, 255, .5);--weui-FG-2: rgba(255, 255, 255, .3);--weui-FG-3: rgba(255, 255, 255, .1);--weui-FG-4: rgba(255, 255, 255, .15);--weui-FG-5: rgba(255, 255, 255, 255, .1);--weui-RED: #fa5151;--weui-REDORANGE: #ff6146;--weui-ORANGE: #c87d2f;;--weui-YELLOW: #cc9c00;--weui-GREEN: #74a800;--weui-LIGHTGREEN: #3eb575;--weui-FIRE: #07c160;--weui-BLUE: #10aeff;--weui-INDIGO: #1196ff;--weui-PURPLE: #8183ff;--weui-WHITE: rgba(255, 255, 255, .8);--weui-LINK: #7d90a9;--weui-TEXTGREEN: #259c5c;--weui-FG: #fff;--weui-BG: #000;--weui-TAG-TEXT-RED: rgba(250, 81, 81, .6);--weui-TAG-BACKGROUND-RED: rgba(250, 81, 81, .1);--weui-TAG-TEXT-ORANGE: rgba(250, 157, 59, .6);--weui-TAG-BACKGROUND-ORANGE: rgba(250, 157, 59, .1);--weui-TAG-TEXT-GREEN: rgba(6, 174, 86, .6);--weui-TAG-BACKGROUND-GREEN: rgba(6, 174, 86, .1);--weui-TAG-TEXT-BLUE: rgba(16, 174, 255, .6);--weui-TAG-BACKGROUND-BLUE: rgba(16, 174, 255, .1);--weui-TAG-TEXT-BLACK: rgba(255, 255, 255, .5);--weui-TAG-BACKGROUND-BLACK: rgba(255, 255, 255, .05)}.data_color_scheme_dark{--weui-BTN-ACTIVE-MASK: rgba(255, 255, 255, 255, .1)}.data_color_scheme_dark{--weui-BTN-DEFAULT-ACTIVE-BG: rgba(255, 255, 255, .126)}.data_color_scheme_dark{--weui-DIALOG-LINE-COLOR: rgba(255, 255, 255, .1)}.data_color_scheme_dark{--weui-BG-COLOR-ACTIVE: #373737}.data_color_scheme_dark{--weui-BG-6: rgba(255, 255, 255, .1);--weui-ACTIVE-MASK: rgba(255, 255, 255, .1)}.rich_media_content{color:#000000e5; font-size:17px; font-size:var(--articleFontsize); overflow:hidden; text-align:justify}.rich_media_content{color:#ffffffa6; color:var(--weui-FG-HALF)}.rich_media_content{position:relative; z-index:0}.wxw-img{vertical-align:bottom}.rich_media_content p{clear:both; min-height:1em}td p{margin:0; padding:0}*{margin:0; padding:0}.rich_media_content *{max-width:100%!important; box-sizing:border-box!important;-webkit-box-sizing:border-box!important; word-wrap:break-word!important}@media screen and (min-width:1024px){body:not(.pages_skin_pc) :root{--appmsgPageGap: 20px}}:root{--articleFontsize: 17px}:root{--sab: env(safe-area-input-bottom)}:root{--wxBorderAvatarRatio: 3}:root{--discussPageGap: 20px}:root{--appmsgPageGap: 20px}body,.wx-root,page{--weui-BTN-HEIGHT: 48;--weui-BTN-HEIGHT-MEDIUM: 40;--weui-BTN-HEIGHT-SMALL: 32}body,.wx-root{--weui-FG-1: rgba(0, 0, 0, .55);--weui-ORANGERED: #ff6146;--weui-BG-0: #ededed;--weui-BG-1: #f7f7f7;;--weui-BG-2: #fff;--weui-BG-3: #f7f7f7;--weui-BG-4: #4c4c4c;--weui-BG-5: #fff;--weui-FG-0: rgba(0, 0, 0, .9);--weui-FG-HALF: rgba(0, 0, 0, .9);--weui-FG-1: rgba(0, 0, 0, .5);--weui-FG-2: rgba(0, 0, 0, .3);--weui-FG-3: rgba(0, 0, 0, .1);--weui-FG-4: rgba(0, 0, 0, .15);--weui-FG-5: rgba(0, 0, 0, .05);--weui-RED: #fa5151;--weui-REDORANGE: #ff6146;--weui-ORANGE: #fa9d3b;--weui-YELLOW: #ffc300;--weui-GREEN: #91d300;--weui-LIGHTGREEN: #95ec69;--weui-FIRE: #07c160;--weui-BLUE: #10aeff;--weui-INDIGO: #1485ee;--weui-PURPLE: #6467f0;--weui-WHITE: #fff;--weui-LINK: #576b95;--weui-TEXTGREEN: #06ae56;--weui-FG: #000;--weui-BG: #fff;--weui-TAG-TEXT-RED: rgba(250, 81, 81, .6);--weui-TAG-BACKGROUND-RED: rgba(250, 81, 81, .1);--weui-TAG-TEXT-ORANGE: #fa9d3b;--weui-TAG-BACKGROUND-ORANGE: rgba(250, 157, 59, .1);-- weui-TAG-TEXT-GREEN: #06ae56;--weui-TAG-BACKGROUND-GREEN: rgba(6, 174, 86, .1);--weui-TAG-TEXT-BLUE: #10aeff;--weui-TAG-BACKGROUND-BLUE: rgba(16, 174, 255, .1);--weui-TAG-TEXT-BLACK: rgba(0, 0, 0, .5);--weui-TAG-BACKGROUND-BLACK: rgba(0, 0, 0, .05)}body,.wx-root{--weui-BG-6: rgba(0, 0, 0, .05);--weui-ACTIVE-MASK: rgba(0, 0, 0, .05)}@media screen and (min-width:1024px){body:not(.pages_skin_pc){background:#191919; background:var(--weui-BG-2)}}@media(prefers-color-scheme:dark){body:not([data-weui-theme=light]).my_comment_empty_data{background-color:#111}}.wx-root,body{--weui-BTN-ACTIVE-MASK: rgba(0, 0, 0, .1)}.wx-root,body{--weui-BTN-DEFAULT-ACTIVE-BG: #e6e6e6}.wx-root,body{--weui-DIALOG-LINE-COLOR: rgba(0, 0, 0, .1)}.wx-root,body{--weui-BG-COLOR-ACTIVE: #ececec}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){-- appmsgExtra-BG: #121212}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--weui-ORANGERED: #ff6146;--weui-BG-0: #111;--weui-BG-1: #1e1e1e;--weui-BG-2: #191919;--weui-BG-3: #202020;--weui-BG-4: #404040;--weui-BG-5: #2c2c2c;--weui-FG-0: rgba(255, 255, 255, .8);--weui-FG-HALF: rgba(255, 255, 255, .6);--weui-FG-1: rgba(255, 255, 255, .5);--weui-FG-2: rgba(255, 255, 255, .3);--weui-FG-3: rgba(255, 255, 255, .1);--weui-FG-4: rgba(255, 255, 255, .15);--weui-FG-5: rgba(255, 255, 255, .. 1);--weui-RED: #fa5151;--weui-REDORANGE: #ff6146;--weui-ORANGE: #c87d2f;--weui-YELLOW: #cc9c00;--weui-GREEN: #74a800;--weui-LIGHTGREEN: #3eb575;--weui-FIRE: #07c160;--weui-BLUE: #10aeff;--weui-INDIGO: #1196ff;--weui-PURPLE: #8183ff;--weui-WHITE: rgba(255, 255, 255, .8);--weui-LINK: #7d90a9;--weui-TEXTGREEN: #259c5c;--weui-FG: #fff;--weui-BG: #000;--weui-TAG-TEXT-RED: rgba(250, 81, 81, .6);-- weui-TAG-BACKGROUND-RED: rgba(250, 81, 81, .1);--weui-TAG-TEXT-ORANGE: rgba(250, 157, 59, .1) 6);--weui-TAG-BACKGROUND-ORANGE: rgba(250, 157, 59, .1);--weui-TAG-TEXT-GREEN: rgba(6, 174, 86, .6);--weui-TAG-BACKGROUND-GREEN: rgba(6, 174, 86, .1);--weui-TAG-TEXT-BLUE: rgba(16, 174, 255, .6);--weui-TAG-BACKGROUND-BLUE: rgba(16, 174, 255, .1);--weui-TAG-TEXT-BLACK: rgba(255, 255, 255, .5);--weui-TAG-BACKGROUND-BLACK: rgba(255, 255, 255, .05)}}@media(prefers-color-scheme: dark){..wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--weui-BTN-ACTIVE-MASK: rgba(255, 255, 255, .1)}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--weui-BTN-DEFAULT-ACTIVE-BG: rgba(255, 255, 255, .126)}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){-weui-DIALOG-LINE-COLOR: rgba(255, 255, 255, .1)}}@media( prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){-APPMSGCARD-BG: #1E1E1E}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--APPMSGCARD-LINE-BG: rgba(255, 255, 255, .07)}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--weui-BG-COLOR-ACTIVE: #373737}}@media(prefers-color-scheme:dark){. wx-root:not([data-weui-theme=light]),,body:not([data-weui-theme=light]){--weui-BG-6: rgba(255, 255, 255, .1);--weui-ACTIVE-MASK: rgba(255, 255, 255, .1)}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--discussInput-BG: rgba(255, 255, 255, .03)}}@media(prefers-color-scheme:dark){.wx-root:not([data-weui-theme=light]),body:not([data-weui-theme=light]){--nickName-FG: #959595}}@media(prefers-color-scheme: dark){body:not([data-weui-theme=light]) .rich_media_content img:not(.wx_img_placeholder){filter:brightness(.8)}}
div.autoTypeSetting24psection > p,div.autoTypeSetting24psection > section{margin-bottom: 24px;}