At the end of the previous article "How "Computer Basics" Computers Know Code", we mentioned that the world's first microprocessor 4004 was Intel, and in this article we will take a look at the Intel series of products.
The Intel series of CPU history
4004
The 4004 is the first microprocessor launched by Intel Corporation in the United States and the world's first microprocessor; Issued on November 15, 1971. The size of the 4004 processor is 3mm×4mm, with 16 pins on the outside and 2300 transistors inside, using a five-layer design and a 10um process technology. The 4004 has a maximum clock of 0.74MHz, can perform 4-bit arithmetic, and supports 8-bit instruction sets and 12-bit address sets. When the clock frequency is only 108KHz, it can be operated 60,000 times per second.
First 4-bit processor
8086
In 1978 and 1979, Intel introduced the 8086 and 8088 chips, which are 16-bit microprocessors containing 29,000 transistors, clock frequency 4.77MHz, 20-bit address bus, and 1MB of memory. The internal data bus is 16 bits, the external data bus 8088 is 8 bits, and the 8086 is 16 bits. In 1981, the 8088 chip was first used in IBMPC machines, ushering in a new era of microcomputers.
DIP40 package for the 8086
8086的die shot
The appearance is similar to the 8051 chip in the textbook, and the functional performance is similar, but the 8051 is more like an SOC. IN 1981, INTEL LAUNCHED THE MCS-51 SINGLE-CHIP WITH 8-BIT DATA, 8051 WAS ONE OF THEM, AND LATER LICENSED TO OTHER CHIP COMPANIES TO DEVELOP VARIOUS FORMS OF 51 MICROCONTROLLER PRODUCTS.
80286
In 1982, Intel introduced the 80286 chip, which contained 134,000 transistors and gradually increased the clock frequency from the initial 6MHz to 20MHz. Its internal and external data bus is 16 bits, the address bus is 24 bits, and it can address 16MB of memory. The 80286 works in two ways: real mode and protected mode.
80286 (PLCC package)
The instruction pipeline of 80286 has 3 levels: fingering, decoding, and execution. There is one more level of decoding than 8086.
80386
In 1985, Intel introduced the 80386 chip, which was the first 32-bit microprocessor in the 80X86 series, containing 275,000 transistors and clocking at 12.5MHz, which was later increased to 20MHz, 25MHz, and 33MHz. Its internal and external data buses are 32-bit, and the address bus is also 32-bit, which can address 4GB of memory. The wide application of 80386 has brought PCs from the 16-bit era to the 32-bit era. More instruction sets than 80286.
386 ceramic package
This ceramic package is very textured, the cost is estimated to be expensive, and it is estimated that it can only be seen in military products.
80486
In 1989, Intel introduced the 80486 chip, which broke the boundary of 1 million transistors and integrated 1.2 million transistors. Its clock frequency is gradually increased from 25MHz to 33MHz and 50MHz. The 80486 integrates the 80386 and the math coprocessor 80387 and an 8KB cache in a single chip, and for the first time in the 80X86 series, RISC technology is used to execute an instruction in one clock cycle.
The performance of the 80486 is 4x higher than the 80386DX with the 80387 math coprocessor.
When it was listed in 1989, the price was $950, and RISC technology was also added to CISC, in fact, everyone was learning from each other, and it was not suitable to simply and crudely distinguish between CISC and RISC.
Intel Pentium
On March 22, 1993, Intel released the 80586 of the P5 architecture, which was officially known as PENTIUM. PENTIUM contains 3.1 million transistors, L1 is 16KB (8+8) clocked at 60MHZ and 66MHZ, Socket 4 (273-pin PGA package), voltage 5V, manufactured using a 0.8um BiCMOS process.
Intel Pentium (P5, 80501) is available in two different packages
Intel Pentium (P5) Die shot
Pentium was followed by several generations of enhanced versions. October 10, 1994 P54C Microarchitecture, 75 MHz ~ 120 MHz, voltage reduced to 3.3V, Socket 5 (273-pin PGA package) / Socket 7 (321-pin PGA package), 3.2 million
Intel Pentium (P54C, 80502)
1995-06-10 P54CS Microarchitecture, 133 MHz ~ 200 MHz, Socket 7 (321-pin PGA package), 3.3 million, raised to 0.35 micron
Intel Pentium (P54CS, 80502)
1997-01-08 P55C Microarchitecture, 120 MHz ~ 233 MHz, L1 cache size: 32 KB (16 KB each for data and instruction cache) 4-way, Socket 7 (321-pin PGA package), 450, using 0.35 and 0.25um processes, first introduced into the MMX instruction set
Pentium MMX
The four Intel Pentium Overdrives are Socket 4, Socket 3, Socket 5, Socket 5, or Socket 7 (MMX), left to right
1997-08 Exclusive version for laptops: Tillamook, 166 MHz ~ 300 MHz, 32 KB (16 KB each for data and instruction cache) 4-way, slot: MMC-1 (280-pin portable computer dedicated processor cartridge), 2.5v, 4.5 million, using 0.25um process.
The form factor of Tillamook's MMC-1 module
Source: https://isite.tw/2016/01/27/14785
Intel Pentium Pro
On November 1, 1995, Intel introduced the Pentium Pro processor. The Pentium Pro operates at 150/166/180 and 200MHz, with 16KB of L1 cache and 256KB of L2 cache. It is based on Pentium's exact same instruction set and compatibility, reaching a processing power of 440 MIPs and 5.5 M transistors. This equates to almost a 2400-fold increase in transistors than the 4004 processor. It is worth mentioning that the Pentium Pro uses "PPGA" packaging technology. That is, a 256KB L2 cache chip is packaged with the Pentium Pro chip, and the two chips are interconnected with a high-frequency and wide internal bus, and the connection line between the processor and the cache is also placed in this package, so that the cache can run more easily at higher frequencies. TDP: 31.7 W ~ 44 W, 16 KB (8 KB each for data and instruction cache) 4-way, L2 cache size: 256 KB / 512 KB / 1 MB, Socket 8 (387-pin PGA package), 5.5 million transistors.
For example, the L2 Cache of the Pentium Pro 200MHz CPU runs at 200MHz, that is, it operates on the same frequency as the processor, which can be regarded as an innovation in CPU technology at the time. The launch of Pentium Pro laid the foundation for Intel's launch of PII.
Intel Pentium Pro L2 Cache area and CPU logical area
The sensation caused by PENTIUM is not over, and Intel has introduced a new generation of microprocessors - P6. THE P6 CONTAINS 5.5 MILLION TRANSISTORS, CLOCKS AT 133MHZ, AND PROCESSES ALMOST TWICE AS FAST AS THE PENTIUM AT 100MHZ.
The P6's L1 (on-chip) cache is 8KB of instructions and 8KB of data. It is worth noting that in addition to the P6 chip, a 256KB L2 cache chip is included in one package of P6, and the two chips are interconnected by a high-frequency and wide-bandwidth internal communication bus. THE MOST NOTABLE FEATURE OF THE P6 IS THAT IT FEATURES AN INNOVATIVE TECHNOLOGY CALLED "DYNAMIC EXECUTION," WHICH IS ANOTHER LEAP FORWARD AFTER PENTIUM'S BREAKTHROUGH IN SUPERSCALAR ARCHITECTURE.
In 1997, on the basis of Pentium (P54C) and P6, there was a new development, a Pentium (P54C), plus 57 multimedia instructions, got the multi-power Pentium (P55C), compared to P54C, P55C has been improved in the following aspects: (1) Support for a new instruction set called MMX multimedia extension, with 57 new instructions for efficient processing of graphics, video, and audio data; (2) Internal cache increased from 16KB to 32KB. (3) Optimized the execution core of the CPU.
Size comparison: Pentium Pro (Socket 8), Xeon E7420 (PGA604), Xeon E5-2690 (LGA2011), Core i7-2820QM (PGA988)
The golden era ended with the Pentium Pro, and the subsequent CPU package felt less luxurious, and it was said that there were hundreds of gold worth in this package
Reference: https://encyclopedia.thefreedictionary.com/Pentium
Intel Pentium II
To compensate for some of the P6's shortcomings, Intel developed two variants of the P6: Klamath (Pentium II) and Deschutes to complement it.
Pentium II uses MMX and AGP technology, its system bus speed reaches 66MHz, the first-level cache contains 16KB instruction cache and 16KB data cache, the second-level cache is 512KB, using a 0.35 micron process, and the CPU operating voltage is 2.8V. 203 mm².
Deschueses (PII 350 and above CPUs) is a 0.25 micron version of the Pentium II with a lower supply voltage and an external frequency of 100MHz.
The Pentium II changed the previous PGA ceramic package and integrated the processor chip, L2 cache, and TAGPAM (to manage the L2 cache) on a single circuit board, and then packaged in the new SEC (SingleEdgeContact). Due to the new SEC package, the Pentium II must be plugged into the 242-wire SLOT1 slot, which means that the Pentium II is not compatible with the Socket7 architecture.
Intel Pentium II (32KB L1) and external 512KB L2 slow speed
Intel® Pentium® II（Slot 1）
Mobile version of the Pentium II processor (MMC package)
The shot(https://encyclopedia2.thefreedictionary.com/Intel+Pentium+II)
Celeron with L2 cache removed in 1998
| Processor Model: Core Code: Interface Type: Instruction Set: Package Type: Frequency: System Front Side Bus Speed: Number of Transistors: L1 Cache: L2 Cache: Process: In Production: Date of Manufacture: | Intel® Pentium® II Xeon™ DrakeSlot 2IA32 (x86), MMXSECC400MHz-450MHz100MHz~7.5 Million32KB512KB-2MB (Full Speed Off Die)0.25微米No1998 |
Intel® Pentium® II Xeon (front and back) 512KB-2MB (Full Speed Off Die) L2
Pentium II OverDrive (left processor) with 512KB of L2 cache (right)
Intel Pentium II OverDrive PODP66X333
Image source: http://www.cpu-collection.de/?l0=i&i=1814&s=big&tb=1&n=0&sd=0
At that time, the reduced version, L2 cache halved overclocking artifact Celeron 300A, at that time because the CPU power consumption was about 20W, unlike now more than a hundred watts, a little improvement of heat dissipation there is an overclocking environment, at that time this CPU also became a classic, especially the 370 package, the motherboard chipset span is large, affordable options are many.
For more information: https://dic.academic.ru/dic.nsf/ruwiki/30897
Intel Pentium III
On February 26, 1999, the Pentium III processor was introduced 800MHz, 256K cache, 133MHz FSB, TPD20.8 watts, 180 nm, the same as the Pentium II, but also a low-end Celeron version and a high-end Xeon version.
The original version of Katmai and Pentium II both used 0.25μm processes, the only difference being the addition of SSE, an improved L1 cache controller, and improved performance.
THE SECOND VERSION, COPPERMINE, BEGAN TO GENERALLY USE THE NEW SOCKET 370 (FC-PGA) interface, and thanks to the use of the 0.18μm process, Intel was able to integrate a low-latency full-speed 256KB L2 cache in the CPU chip.
Coppermine-T: The Coppermine CPU pins in the FC-PGA2 package are different from Coppermine and are not compatible with FC-PGA.
The last version, Tualatin, was just actually Intel's 0.13μm process test. Introduced in 2001 and early 2002, clocked at 1.0, 1.13, 1.2, 1.26, 1.33 and 1.4 GHz, also using 256K L2 cache. However, due to the use of the FC-PGA2 package, it is not compatible with previous motherboards. Tualatin for the desktop market is produced very little, and most of Tualatin, especially a derivative of the 512KB L2 cache (called Pentium III.-S) is used in the server market.
Katmai Core Pentium III (slot package)
Socket 370 package Pentium III (Coppermine core)
Intel Pentium 4
Intel Corporation released the 7th generation x86 microprocessor in November 2000. It was the first redesigned processor after the Pentium Pro from 1995, and the new architecture was called NetBurst. The first product code: Willamette, with a core clock of around 1.4GHz and using the Socket 423 pin architecture, the first processor was released in November 2000. The frequency war was started, but the performance was not greatly improved. By 4GHz, the power problem stopped, and in mid-2005 the Pentium 4 was abandoned in favor of the less heated Pentium M.
Intel Pentium 4 comes in different specifications
Intel currently sells CPUs
Intel processor inventory
The above information comes from Intel's official website: https://ark.intel.com/content/www/us/en/ark.html#@Processors
Intel processor brand and brief description
Core is a series of CPUs from Intel Corporation aimed at mid-to-high-end consumers, workstations and enthusiasts. Core replaced the once mid-to-high-end PenTium, moving the Pentium to the entry-level and pushing the Celeron processor to the lower end. The current common I3I5I5 is this series, and I7 has also produced the Extreme Edition Intel Core i7 Extreme EdiTIon, as well as the I9 processor.
PenTium is a registered trademark of Intel Corporation as one of its x86 processor brands, introduced in 1993. Previously, Pentium was Intel's only x86 processor product line, and as its product line expanded, it derived the low-end Celeron series and the Xeon series for servers and workstations. In 2006, Intel launched the Core processor product line, replacing the market positioning of the original Pentium processor series. Now Pentium is positioned as a mid-range series, between Celeron and Core.
Celeron is a registered trademark of Intel Corporation's CPU processing unit. The Celeron processor is Intel's economical product and was introduced in 1998.
Xeon is a brand of central processing unit from Intel that is mainly used in servers and workstations, and is also used in supercomputers. Intel XeonE3-1230 was once popular with computer DIYers because of its high cost performance, and has the reputation of "i5 price, i7 performance".
Itanium is a 64-bit processor on Intel Itanium architecture (IA-64). The first Itanium was introduced in 2001 and was marketed for enterprise servers and high-performance computing systems.
Atom, codenamed Silverthorne, is a family of ultra-low voltage processors from Intel. The market positioning of the processor is for smartphones, tablets and low-cost PCs, netbooks, etc.
Quark is Intel's family of 32-bit x86 SoCs and μCs designed for small form factor and low-power devices and targeting new markets including wearables. This processor, although slower than the Atom processor, is smaller in size and consumes less power.
Adler Lake
At the 2021 Hot Chips conference, Intel explained in detail the architecture of the high-performance processor - Alder Lake. Alder Lake is Intel's desktop-grade CPU architecture, and Intel abandoned the design of homogeneous CPU cores in favor of large and small cores. The P-series big cores focus on single-threaded performance, and there are two new things: one is the Matrix Engine, which acts as an AI coprocessor; The other is the PM Controller, which is responsible for fine-grained power management.
E-series small cores focus on multi-threaded throughput, so the front-end of small cores is deeper and the back-end is wider. In addition, the ISA of small and large cores is compatible, and the quad-core shares MLC.
In addition, Alder Lake introduced Thread Director for the scheduling of large and small cores. The working principle is to classify applications according to the difference in IPC deployed on large or small cores, and then the OS schedules according to the application type.
The parameters identified by the CPU-Z software are to turn off AVX-512 and turn on AVX-512
ITD, or Interl Thread Director, is a new way to schedule hardware resources. The Alder Lake architecture will contain two different processor cores: P-Core and E-Core. Just like the large and small cores in ARM-based SoCs, P-Cores and E-Cores have their own differences in performance and energy consumption. Due to the differences in structure, energy consumption and types of computing that the two cores are good at, how to schedule the two cores and assign user operations to the appropriate core has become the primary problem that Alder Lake has to face.
ITD emerged to solve the problem of hardware resource allocation. Before the advent of ITD, Windows used a relatively simple way of allocating hardware resources: Windows 10 believed that whichever software was in the foreground and which software had the highest priority could be assigned to the strongest core. At the same time, in the past, the information reporting between the processor and the operating system was relatively single, and the operating system could not understand the working status of each core in detail.
According to data released by Intel, Alder Lake can support up to 16 mixed cores, 24 threads, and 30MB of L3 cache, while supporting DDR5-4800, 16-lane PCIe 5.0, Thunderbolt 4, Wi-Fi 6E and other latest interface, storage and data transmission technologies.
Seeing this, you should have a preliminary impression of Intel, one of the main manufacturers of general-purpose CPUs. The building of the CPU has also developed step by step from a simple 4004 to the extent it is today, and each step of change has historical reasons and traces.
Article source: Yang Hua_https://zhuanlan.zhihu.com/p/464413953