讀華為技術文檔《FIFO經驗談》看到的這個電路:
FIFO的讀寫位址産生比較簡單,當讀使能有效時,在時鐘作用下,讀位址加1;當寫使能有效時,寫位址加1。
1 /************************************************************\
2 * *
3 * Generation of Read and Write address pointers. They use *
4 * LFSR counters, which are very fast. Because of the *
5 * nature of LFSR, one address is sacrificed. *
6 * *
7 \************************************************************/
8 wire read_linearfeedback, write_linearfeedback;
9
10 assign read_linearfeedback = ! (read_addr[8] ^ read_addr[4]);
11 assign write_linearfeedback = ! (write_addr[8] ^ write_addr[4]);
12
13 always @(posedge clock or posedge fifo_gsr)
14 if (fifo_gsr) read_addr <= 9'h0;
15 else if (read_allow)
16 read_addr <= { read_addr[7], read_addr[6], read_addr[5],
17 read_addr[4], read_addr[3], read_addr[2],
18 read_addr[1], read_addr[0], read_linearfeedback };
19
20 always @(posedge clock or posedge fifo_gsr)
21 if (fifo_gsr) write_addr <= 9'h0
22 else if (write_allow)
23 write_addr <= { write_addr[7], write_addr[6], write_addr[5],
24 write_addr[4], write_addr[3], write_addr[2],
25 write_addr[1], write_addr[0], write_linearfeedback };