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Digital System Clocking
High-Performance and Low-Power Aspects
Vojin G. Oklobdzija
Vladimir M. Stojanovic
Dejan M. Markovic
Nikola M. Nedovic
The Institute of Electrical and Electronics Engineers, Inc., New York
Wiley-Interscience
A John Wiley&Sons Publication
Copyright 2003 b6 John Wiley&Sons,Inc. All rights reserved
CONTENTS
Perface
Chapter1 Introduction
Chapter2 Theory of Clocked Storage Elements
Chapter3 Timing and Energy Parameters
Chapter4 Pipelining and Timing Analysis
Chapter5 High-Performance System Issues
Chapter6 Low-Engergy System Issues
Chapter7 Simulation Techniques
Chapter8 State-of-the-Art Clocked Storage Elements in CMOS Technology
Chapter9 Microprocessor Examples
In order to Achieve higher Microprocessor Performance than that available today and set the stage for a number of successfull future designs
The motto of the Alpha clocking system design can be stated as:"The primary objective of the clock system is to not limit the performance of the microprocessor"
Recognize that CES/Pipeline is the significant cornerstone of Digital System, which improve the Performance、Power and so on.