【DSP】TMS320F28035 SCI例程（自发自收+查询）

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

void scia_loopback_init(void);
void scia_fifo_init(void);
void error();

Uint16 LoopCount;
Uint16 ErrorCount;
Uint16 SendChar;
Uint16 ReceivedChar;

void main(void)
{
    InitSysCtrl();

    InitSciGpio();//初始化SCI引脚

    DINT;
    IER = ;
    IFR = ;
    InitPieVectTable();

    PieCtrlRegs.PIECTRL.bit.ENPIE = ;//使能PIE
    PieCtrlRegs.PIEACK.all = ;//写1清零，允许所有PIE都能被响应
    EINT;//开启总中断

    LoopCount = ;
    ErrorCount = ;

    scia_fifo_init();      // Initialize the SCI FIFO
    scia_loopback_init();  // Initalize SCI for digital loop back

    SendChar = ;

    for(;;)
    {
       DELAY_US();

       //将要发送的数据存入SCITXBUF
       SciaRegs.SCITXBUF = SendChar;

       //等待发送完成
       while(SciaRegs.SCIFFRX.bit.RXFFST !=) { } // wait for RRDY/RXFFST =1 for 1 data available in FIFO

       //存储接收数据
       ReceivedChar = SciaRegs.SCIRXBUF.all;

       //自检
       if(ReceivedChar != SendChar) error();

       //发送的数据
       SendChar++;
       // Limit the character to 8-bits
       SendChar &= ;

       LoopCount++;
    }

}


// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:

void error()
{
      ErrorCount++;
}

// Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity
void scia_loopback_init()
{
    SciaRegs.SCICCR.all =;   // 1 stop bit,  No loopback
    //配置通讯协议                               // No parity,8 char bits,
                                   // async mode, idle-line protocol
    SciaRegs.SCICTL1.all =;  // enable TX, RX, internal SCICLK,
                                   // Disable RX ERR, SLEEP, TXWAKE
    SciaRegs.SCICTL2.all =;
    SciaRegs.SCICTL2.bit.TXINTENA =;
    SciaRegs.SCICTL2.bit.RXBKINTENA =;
    SciaRegs.SCIHBAUD    =;
    SciaRegs.SCILBAUD    =;
    SciaRegs.SCICCR.bit.LOOPBKENA =; // Enable loop back
    SciaRegs.SCICTL1.all =;     // Relinquish SCI from Reset
}
// Initalize the SCI FIFO
void scia_fifo_init()
{
    SciaRegs.SCIFFTX.all=;
    SciaRegs.SCIFFRX.all=;
    SciaRegs.SCIFFCT.all=;
}