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Chip manufacturing cost bottlenecks have emerged, and prices have stopped falling a decade ago

Chip manufacturing cost bottlenecks have emerged, and prices have stopped falling a decade ago

IT Home reported on February 4 that the chip industry has been following Moore's Law, that is, the number of transistors on integrated circuits doubles every two years and the cost is halved. However, this law seems to be losing its validity. Zvi Or-Bach, CEO of MonolithIC 3D, suggested in 2014 that the unit cost of transistors had stopped falling after the 28nm process. This view was confirmed by Google's Milind Shah, who showed that the unit cost of 100 million gate transistors has actually risen since TSMC mass-produced the 28nm planar process in 2012.

Chip manufacturing cost bottlenecks have emerged, and prices have stopped falling a decade ago

Source: TSMC

Google's findings show that "transistor cost declines have stalled at 28nm and have flattened generational change." ”

For many years, the industry has been concerned about the diminishing benefits of the unit cost of transistors at new process nodes. The latest chip manufacturing processes, such as 7nm, 5nm, and 3nm, require more complex and expensive manufacturing equipment that can cost hundreds of millions of dollars. For example, an ASML Twinscan NXE lithography machine costs $200 million. This has pushed the cost of building cutting-edge fabs to $20 billion to $30 billion, resulting in high chip production costs.

Chip manufacturing cost bottlenecks have emerged, and prices have stopped falling a decade ago

IT Home noted that the chart presented by Milind Shah at the IEDM industry show that the cost of 100 million gate transistors benchmarked at 28nm has actually been flat or even increased, and this cost stagnation has made some chip designs reluctant to adopt the latest process. Conversely, it becomes more attractive to break down the chip into multiple chiplets and integrate them. For example, AMD's Ryzen desktop CPUs and Intel's Meteor Lake notebook CPUs both use this approach, consisting of 3 to 4 chips with different processes.

However, there are some challenges associated with multi-chip designs. First, they are generally more power-hungry than single-chip designs and are not suitable for mobile devices. Second, multi-chip integration is a complex engineering task, and while companies like MonolithIC 3D offer integration services, they can be expensive. Finally, advanced packaging technology is inherently expensive, and it is as difficult to obtain packaging capacity as advanced processes.

While new processes no longer reduce transistor costs, they are still important for chip designs that cannot be effectively disassembled or are difficult to disassemble.

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