21st Century Business Herald reporter Luo Yiqi reported from Shanghai and Shenzhen
At the upstream chip architecture level of semiconductors, for many years, the server field has been dominated by X86, and mobile terminals have occupied an absolute dominant position of 99% with Arm.
But the market will always welcome new entrants, especially similar architectures that are both Reduced Instruction Set (RISC) with Arm, to compete in the market. On the one hand, this stems from the closed nature of some existing architectures, on the other hand, the high cost of chip licensing has also prompted the market to find new development models.
RISC-V came into the spotlight, though not new, and was actually invented in 2010 by a professor at the University of California, Berkeley. According to statistics, in 2022, the global shipment of chips using RISC-V architecture has exceeded 10 billion. For reference, this is faster than the Arm architecture.
The semiconductor market also calls for an open source basic chip architecture that is not dominated by a single manufacturer. Ni Guangnan, an academician of the Chinese Academy of Engineering, has said many times that China should pay attention to the RISC-V architecture in the process of chip industry development, in addition to the advantages of the architecture itself, its ecological cultivation has been increasingly improved in recent years.
The industry's positioning of RISC-V is that it will "divide the world" with X86 and Arm.
RISC-V is growing rapidly
What is RISC-V? Why is this new architecture pushed to the fore in the face of the powerful existing structure?
To some extent, RISC-V and Arm belong to the same reduced instruction set (RISC) architecture, compared with the complex instruction set (CISC) architecture of X86, the former has the characteristics of lower power consumption and relatively simple operation, and the latter is more inclined to heavier scale computing power. Therefore, in application scenarios, X86 is more used in scenarios with higher scale computing such as servers, and Arm, one of the representatives of RISC, is more used in relatively lightweight electronic terminal equipment such as mobile phones.
In terms of business model, X86 is a closed instruction architecture, and the suppliers are mainly Intel and AMD, based on the architecture to develop chips and sell; The Arm architecture is developed by Arm, based on which processor cores are redeveloped and sold to chip design companies.
Therefore, RISC-V is currently the mainstream architecture on the market, not dominated by a single company, and adopts an open source architecture, which is characterized by customization and easy expansion.
In recent years, more and more leading companies and industry figures in the semiconductor industry have begun to participate in the construction of RISC-V.
Not long ago, global chip leading companies Qualcomm, Bosch, Infineon, Nordic Semiconductor, NXP, etc. announced that they will join forces to form a new company focusing on RISC-V technology, the initial focus will be in the automotive field, and the long-term goal is to expand to mobile and Internet of Things and other markets. Of course, the landing of new companies is subject to regulatory approval.
Many semiconductor industry veterans who have served as core R&D personnel in Apple, AMD and other companies have also joined chip startups positioning RISC-V architecture to serve as core positions. For example, Jim Kelle, who has participated in the development of Apple's A4 and A5 processor chips, is also a key figure on AMD's way to catch up with Intel, and is currently working for TenstorrentInc, a Canadian chip unicorn company focusing on RISC-V chip development.
"Looking at the cattle of overseas head chip design companies, you will find that many newly established and much-watched RISC-V chip companies were originally from the Apple chip team. They moved from the x86 architecture to the Arm architecture and now work on RISC-V. I would think that this group of people is repeatedly exploring the way in the flow, but this basically represents the future trend. A chip industry practitioner sighed to reporters.
"To some extent, RISC-V has the feeling of stepping on an Arm's stone to cross the river, including the process of applying the landing and building the ecology." The person analyzed that at present, in terms of ecological construction, the biggest feeling is that there are more and more enterprises involved, and the volume of enterprises is getting higher and higher.
Similar to Arm's Linaro ecosystem, Google, Qualcomm, Intel and other companies participated in the launch of the Global RISC-V Software Ecosystem Plan (RISE), aiming to accelerate the ecological construction and application commercialization of RISC-V new architecture, and members will promote RISC-V processors in mobile communications, data centers, edge computing and autonomous driving.
"It's like the Matthew effect, winner takes all." The aforementioned person further said that typical Arm's high-end product roadmap is being driven by Apple, in the view of domestic startups, some chip industry leaders entered, RISC-V itself leading companies are also actively launching products, which leads to the result that even if you look back on a one-year cycle, you will find that the application scenarios and performance iterations have changed and improved. "The feeling now is that if you don't enter the RISC-V industry, you won't have a chance to come in later."
Enter complex chips
Since the early years of IoT and MCU chips, RISC-V architecture has entered more and more complex chip fields.
A practitioner who has been engaged in the design of Arm architecture chips for many years told reporters, "RISC-V's nuclear performance at the hardware level has developed to a new stage, and the industry also hopes to find a new industrial force that is not dominated by a single enterprise in addition to the existing leaders of X86 and Arm." The next thing that needs to be improved is the software ecology, which will also include a series of integration of IP, which will slowly develop RISC-V chips from low-end to high-end. ”
During the third Dishuihu China RISC-V Industry Forum held recently, reporters found that RISC-V chip products in the fields of high-performance CPU, AI computing, and communications have appeared, and some of them have achieved mass production.
(Results of the vote on the topic of "where RISC-V is expected to 'divide the world'?" Source: Dishui Lake Forum official)
The typical representative is the aforementioned Tenstorrent Inc company, which is positioned to create high-performance RISC-V chips. Weihan Lian, chief CPU architect of TenstorrentInc, analyzed on the spot that computing should happen in any corner. For example, humans, as complex biological machines, do not let all the information that the skin comes into contact with have to be transmitted to the brain to make decisions, but some tactile information is screened at the skin level. Similarly, in the field of computing, all received computing information will not be uploaded to the cloud, but computing will occur in every corner to better realize the power requirements.
This requires scalability, streamlining, and open source of the underlying capabilities of the chip; At the same time, although the Transformer architecture is currently the core of driving AI, if there are variables in the future, the chip design needs to be flexible enough, and RISC-V happens to have these capabilities.
According to public information, in a professional benchmark, Tenstorrent launched RISC-V CPU chips based on its own processor cores, ahead of Intel's Sapphire Rapids, Nvidia's Grace and AMD's Zen4.
Zhou Jin, vice president of Nanjing Chuangxin Huilian Technology Co., Ltd., pointed out that RISC-V has many benefits, but a big problem is code density. No one dared to use RISC-V to design communication base station chips before, because its algorithm is too complex and it is difficult to optimize the code to the extreme in a limited time. However, through cooperation with domestic industry chain manufacturers, the products launched by it can already use 64-bit large cores to achieve better integration and will be commercialized.
"In the future, a mobile phone is a cloud service terminal, and RISC-V will have great value." Zhou Jin analyzed that the two core points in the wave of generative AI are: computing power and data. That is, use IoT to generate enough data, pour it into large computing power chips, and circulate it through the 5G network; In the future, ultra-low latency technology will be used to present it on glasses.
"With RISC-V's capabilities and baseband development capabilities, coupled with the cloud-network system of domestic operators, it is possible to establish a completely new product form: a glasses that are half lighter than the current Apple Glasses, but the effect is similar and the cost is very low, hoping to accelerate the metaverse readiness with RISC-V as the power." He continued.
According to the reporter, there are also domestic institutions trying to design GPGPU chips with RISC-V architecture. "There are two core reasons, the first is that RISC-V's Vector extension supports GPGPU implementation; The second is that when practitioners do not want to just buy public IP to make products, but need to embed their own unique needs, RISC-V as an open source instruction set architecture accepted by most people, it is logical to choose. The head of the team told the 21st Century Business Herald reporter.
How to "divide the world"?
From simple chips on the way to high-end, RISC-V is mainly optimistic about the landing point of automobiles and AI-related, about which of these scenarios is easier to land, the industry may still have its own answers, and the relevant fields have been achieved in China.
(Voting on the topic of "RISC-V high-end applications are easier to land in server and automotive electronics scenarios", source: Dishuihu Forum official)
Xinlai Technology is the world's first company to make breakthroughs in the field of automotive regulations. According to Peng Jianying, CEO of Xinlai Technology, its functional safety CPU-NA900 is the first RISC-V CPU IP certified ISO26262 ASIL-D products.
"Why did we choose cars as our main focus? Because the emergence of new energy vehicles has brought new changes to the electrification architecture, it means that there are new markets and new technology needs, which brings new development opportunities to RISC-V. She further analyzed that in the automotive chip industry, the overall start in China is relatively late, and she hopes to complete the process from 0 to 1 with domestic automotive upstream and downstream partners with the help of RISC-V.
"In the new automotive electronics, many market segments are no longer as familiar as the traditional such as automotive MCUs, we see OEMs in the front, many market segments such as millimeter wave, lidar, automotive Ethernet, etc. appear, 'new' means the need to innovate, and it will be more open to new technologies." Our customers accept and embrace RISC-V much more than traditional chip design companies. Peng Jianying said.
Lian Weihan also analyzed that the future car can be similarly understood as a mobile phone with four wheels. "The biggest anxiety for big car companies right now is that the advantages of driving systems that they used to be best at are missing in electric vehicles. The only thing that can compete with new entrants is the in-vehicle system. This is also why so many car companies have to find different electronics companies to help do the matching, because there must be differences, the on-board system performance is good, in order to move to a more high-end field. So the future automotive electronic system must be a customized instruction set. ”
From this point of view, the current X86 and Arm architectures rarely provide customization requirements for small companies, and the only option is the RISC-V architecture. "So I think at the current juncture, RISC-V has good opportunities in autonomous driving, electronic systems, etc." He further pointed out that on the whole, RISC-V architecture will be relatively more opportunities to promote high-performance computing, servers, and vehicles.
As for when RISC-V can really be expected to come to the "three-point world", the aforementioned industry insiders told reporters that if there are some variables in the Arm licensing system, and RISC-V's high performance is progressing more smoothly, nuclear performance is improving quickly, and the ecology is also going smoothly, soon Arm will go head-to-head with RISC-V.
Of course, RISC-V, as a latecomer, faces many challenges. In addition to the ecological construction is still in the process of improvement, this open source architecture should also avoid the problems of decentralization and fragmentation brought by the previous MIPS architecture.
The aforementioned practitioner told the 21st Century Business Herald reporter for example, "Arm is just a company, but after so many manufacturers have joined the RISC-V architecture, how to integrate the ecosystem, the most important thing is how to distribute business benefits, are all topics that practitioners need to discuss." ”
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