IT House News on May 15, India's Advanced Computing Development Center (C-DAC) announced that it is developing a series of ARM-based CPUs, including the flagship AUM chip. Now, the company has unveiled the first details of its AUM processor, which will target the HPC space, scheduled for release in 2024.
According to reports, this flagship chip has 96 ARM cores, 96 GB HBM3, 128 PCIe Gen 5 lanes, and a TDP of up to 320W.
C-DAC says they are developing multiple options for domestic applications, ranging from smart devices, IoT, AR/VR to high-performance computing and data centers.
C-DAC's Vega series of CPUs are based on dual- and quad-core designs and are targeted at entry-level customers who require low-power and low-cost chips, and are expected to meet at least 10% of India's chip needs. In addition, the company is preparing to launch an octa-core chip over the next three years as a successor to the Dhruv and Dhanush Plus chips.
But that's not all, the company is now announcing that it is working on a very energy-efficient high-performance computing chip. As part of India's National Supercomputing Mission (NSM) initiative, the chip will target large-scale workloads, known as C-DAC AUM processors.
C-DAC AUM is based on the ARM Neoverse V1 architecture, codenamed Zeus, with a total of 96 cores, but is divided into two chiplets containing 48 V1 cores each. Among them, each chip has its own memory, I/O, C2C/D2D interconnect, cache, security, and MSCP subsystem sections.
According to reports, they connected the two A48Z-based chiplets together using a D2D interconnect architecture on the same middle layer. Each chip also carries 96 MB of L2 cache and 96 MB of system cache.
In addition, C-DAC AUM uses 64 GB of HBM3-5600 memory, as well as 96 GB HBM3 memory and 8 channels of DDR5-5200 memory (IT Home Note: Expandable up to 16 lanes for a total bandwidth of 332.8 GB/s).
Thanks to the triple memory subsystem design, the CPU will host 64/128 PCIe Gen 5 lanes, support CXL, and run on platforms that can contain two of these chips.
The CPU will be manufactured on TSMC's 5nm process at frequencies between approximately 3.0 - 3.5 GHz, pure CPU nodes will deliver up to 10 TFLOPs per node, 4.6+ TFLOPs per socket, and up to 4 standard GPU accelerators in the case of a dual-socket server design.
C-DAC said they will also prepare a suite of HPC system software and development tools to realize the full potential of their hardware. The company expects to achieve 64 PetaFlops of hashrate power in India by the end of 2024, while AUM chips are expected to be available in 2023-2024.