The discovery of two-dimensional materials such as graphene and molybdenum disulfide (MoS2) has led to the realization that materials can have good electrical properties even at the scale of several atomic layers. For the past two decades, scientists have tried to apply these two-dimensional materials to transistors to make transistors have a smaller volume, thus enabling electronic chips with a higher degree of integration. However, despite various methods, the effective gate length of the transistor is difficult to drop below 1 nanometer.
On March 9, 2022, Professor Ren Tianling's team from the School of Integrated Circuits of Tsinghua University successfully prepared an ultra-small MoS2 transistor with a vertical structure, achieving an effective gate length of 0.34 nanometers for the first time, and the results were published in the journal Nature. The Fruit Shell Hard Technology Team first got in touch with Professor Ren Tianling, who introduced: "This work has promoted the further development of Moore's Law to the sub-nanometer level, and at the same time provided an important path for the application of two-dimensional nano electronic materials in integrated circuits in the future." ”
Technical difficulties of traditional MoS2 transistors
The transistor is the soul of the electronic chip, and if the chip is regarded as the human brain, then the transistor is the neuron in the brain. In a typical transistor structure, the input and output electrodes (also known as source and drain) are connected by a channel, and the control electrode (also known as the gate) is attached to the channel and separated from the channel by a layer of insulated media.
The control electrode can act as a switching channel, that is, by applying a high or low level to it, and then determine whether the output electrode can use the channel to obtain the corresponding current/voltage signal from the input electrode, thereby achieving basic logic operations. In traditional transistor structures, the size of the transistor is mainly limited by the length of the control electrode.
"Over the past few decades, the gate size of transistors has been shrinking. However, as the physical size of transistors has entered the nanoscale in recent years, the short-channel effects such as reduced mobility, increased leakage current, and increased static power consumption have become more and more serious, which makes the development of new structures and new materials urgent. According to IRDS2021, the gate size of the transistors in the mainstream industry is currently above 12 nm, and how to promote the further scaling of the key size of the transistors has aroused the interest of a wide range of researchers. Professor Ren Tianling introduced.
In current technology, MoS2 transistors utilize a MoS2 material at the atomic layer level thickness to achieve ultra-thin channels. However, the MoS2 channel is usually the horizontal material layer attached to the input electrode and the output electrode, so for the control electrode attached to the MoS2 channel, the length limit mainly depends on the dimensional resolution of the lithography process, that is, whether the lithography machine making the chip can make a sufficiently small structure in the horizontal direction. In order to avoid this technical bottleneck, the research team creatively used the edge part of the horizontal graphene layer as the control electrode, so that the length of the control electrode is not limited to lithography technology.
Traditional MoS2 transistor structure, where the orange part represents the output and input electrodes, the light brown part represents the control electrode, the brick red part represents the dielectric material, and the molecular layer shown by MoS2 is the channel | References[1]
Advantages of vertical MoS2 transistors
The newly prepared MoS2 transistors abandon the traditional horizontal MoS2 channel and instead build a "step" between the input and output electrodes with a single-molecule layer of MoS2.
As a result, the edge of the "step" forms a MoS2 channel in the vertical direction; at the same time, a horizontally placed single-atom graphene layer is provided inside the "step", and the edge of the graphene layer is isolated from the vertical MoS2 channel through hafnium dioxide (HfO2) on the surface of the "step", thus forming a control electrode. Since the direction of the channel is vertical, the "length" of the control electrode becomes the thickness of the graphene layer.
"MoS2 materials have greater effective electron mass and lower dielectric constants to effectively mitigate short-channel effects, while graphene has a natural ultra-thin thickness of 0.34 nanometers." Professor Ren Tianling said, "The combination of these two materials can produce the sub-nano gate long transistor proposed in this study."
The vertical MoS2 transistor structure diagram prepared by Professor Ren Tianling's team, in which Source (source) and Dirin (drain) are the output and input electrodes, and monolayer graphene edge gate (gate) is a single layer graphene edge gate, that is, the control electrode | References[1]
In addition, in order to avoid interference, the "step" also provides a layer of aluminum above the graphene layer to shield the electric field in the vertical direction, thus ensuring that the channel is only controlled by the electric field from the edge of the graphene layer, that is, ensuring that only the edge part of the graphene layer is the "effective" gate.
Through experimental testing, the current ratio of the channel of the newly prepared MoS2 transistor in the on-off state can reach 1.02e5, and only a minimum voltage change of 117mV is required during the shutdown process to reduce the current by an order of magnitude. It can be seen that the ultra-small transistor also has excellent switching characteristics.
Application prospects
According to Moore's Law, the density of transistors on integrated circuits will double every two years. However, limited by the development of microelectronics processing technology, the current status of the chip industry has lagged far behind this forecast. How to make a leap in transistor size and pull reality back to the prediction trajectory of Moore's Law has been the dream of the chip industry for more than a decade. The research results of Professor Ren Tianling's team have directly reduced the length of the control electrode of the transistor to the thickness of the single layer of graphene, which undoubtedly brought dawn to the technological breakthrough of sub-nanometer transistors.
Statistics on the current development of transistor gate length miniature in industry and academia, this work took the lead in reaching sub-1 nanometer | References[1]
Professor Ren Tianling said: "We are very willing to further connect with the industry, and the next step is to develop a large-scale integrated circuit with a 0.34 nm gate length transistor to bring the technology to practical use." ”
bibliography
[1] Wu, F., Tian, H., Shen, Y. et al. Vertical MoS2 transistors with sub-1-nm gate lengths. Nature 603, 259–264 (2022). https://doi.org/10.1038/s41586-021-04323-3
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