APB協定斷言檢查你必需知道的幾點

APB協定斷言檢查

• 一、APB時序圖
• • 1.write transfer
  • 2.Read transfer
  • 3.Operating states
• 二、APB協定斷言檢查
• • 1.psel為高時，paddr不可以為X值
  • 2. psel 拉高的下一周期，penable必須拉高
  • 3.在penable拉高的下一周期，penable應該拉低
  • 4.psel和pwrite同時保持高的階段，pwdata需要保持不變
  • 5.在下次傳輸開始前，paddr和pwrite信号應該保持不變
  • 6.在penable拉高的同一個周期，prdata也應該發生變化

一、APB時序圖

1.write transfer

2.Read transfer

3.Operating states

二、APB協定斷言檢查

1.psel為高時，paddr不可以為X值

property psel_no_x;
	@(posedge clk) psel |-> not ($isunknown(paddr));
endproperty: psel_no_x

assert property (psel_no_x) else 
	`uvm_error("ASSERT", "PADDR is unknown when PSEL is high")
           

2. psel 拉高的下一周期，penable必須拉高

property psel_rose_then_penable_rose;
	@(posedge) $rose(psel) ##1 $rose(penable);
endproperty: psel_rose_then_penable_rose

assert property(psel_rose_then_penable_rose ）else
	`uvm_error("ASSERT", "PENABLE not rose after 1 cycle PSEL rose")
           

3.在penable拉高的下一周期，penable應該拉低

property penable_rose_next_cycle_fell;
	@(posedge clk) $rose(penable) ##1 $fell(penable);
endproperty

assert property(penable_high_then_low) else
	`uvm_error("ASSERT", "PENABLE not fall after 1 cycle PENABLE rose")
           

4.psel和pwrite同時保持高的階段，pwdata需要保持不變

property pwdata_stable_during_trans_phase;
	@(posedge clk) ((plse && !penable) ##1 (psel && penabel) ) |-> $stable(pwdata);
endproperty

assert property(pwdata_stable_during_trans_phase) else
	`uvm_error("ASSERT", "PWDATA not stable during transaction phase")
           

5.在下次傳輸開始前，paddr和pwrite信号應該保持不變

property paddr_stable_until_next_trans;
    logic[31:0] addr1, addr2;
    @(posedge clk) first_match(($rose(penable),addr1=paddr) ##1 ((psel && !penable)[=1],addr2=$past(paddr))) |-> addr1 == addr2;
  endproperty: paddr_stable_until_next_trans
  
  assert property(paddr_stable_until_next_trans)
  	 else `uvm_error("ASSERT", "PADDR not stable until next transaction start")
  	 
//------------------------------------------------------------------------------------------------------//

property pwrite_stable_until_next_trans;
    logic pwrite1, pwrite2;
    @(posedge clk) first_match(($rose(penable),pwrite1=pwrite) ##1 ((psel && !penable)[=1],pwrite2=$past(pwrite))) |-> pwrite1 == pwrite2;
  endproperty: pwrite_stable_until_next_trans
  
  assert property(pwrite_stable_until_next_trans) else 
  	`uvm_error("ASSERT", "PWRITE not stable until next transaction start")
           

6.在penable拉高的同一個周期，prdata也應該發生變化

property prdata_available_once_penable_rose;
    @(posedge clk) $rose(penable) && !pwrite |-> !$stable(prdata);
  endproperty: prdata_available_once_penable_rose
  assert property(prdata_available_once_penable_rose) else `
  	`uvm_error("ASSERT", "PRDATA not available once PENABLE rose")