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用于FPGA和ASIC開發的編譯器基礎架構(CS PL)

本白皮書為硬體設計工具提出了一個統一的架構,以簡化該工具的開發和互操作性。通過跨供應商,學術界和開源社群建立了一個大型的硬體開發工具生态系統,我們希望能夠顯著提高硬體設計的生産率。

原文題目:A Compiler Infrastructure for FPGA and ASIC Development

原文:This whitepaper proposes a unified framework for hardware design tools to ease the development and inter-operability of said tools. By creating a large ecosystem of hardware development tools across vendors, academia, and the open source community, we hope to significantly increase much need productivity in hardware design.

原文作者:John Demme

原文位址:https://arxiv.org/abs/2003.00151

用于FPGA和ASIC開發的編譯器基礎架構(CS PL).pdf