NVIDIA JetPack4.2.2 新版本系統上修改Jetson-TX2配置為配置3
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簡述
NVIDIA Jetson 的系統版本更新後它的配置方式和驅動等都發生了變化,若是想修改預設配置為配置3,就不能按照JetPack4之前的版本來修改了,在這裡為各位分享我在新版本系統上修改配置3的方法。
配置3:使能2個USB3.0和3個PCIeJetPack4.2.2系統上修改TX2配置為配置3NVIDIA JetPack4.2.2 新版本系統上修改Jetson-TX2配置為配置3
設定步驟
- 修改ODMDATA值,将檔案p2771-0000.conf.common中的ODMDATA修改為0x6090000 .
local board_id="${1}";
local board_version="${2}";
local board_sku="${3}";
local board_revision="${4}";
local bdv=${board_version^^};
local bid=${board_id^^};
local uboot_build=500;
local fromfab="-a00";
local tofab="-c03"; # default = C03
local pmicfab="-c00"; # default = C00
local bpfdtbfab="-c00"; # default = C00
local tbcdtbfab="-c03"; # default = C03
local kerndtbfab="-c03"; # default = C03
ODMDATA=0x6090000; # default = C0X
- 修改tegra186-quill-p3310-1000-a00-00-base.dts檔案,更改如下:
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
[email protected]3530000 {
status = "okay";
phys = <&{/[email protected]3520000/pads/usb2/lanes/usb2-0}>,
<&{/[email protected]3520000/pads/usb2/lanes/usb2-1}>,
<&{/[email protected]3520000/pads/usb2/lanes/usb2-2}>,
<&{/[email protected]3520000/pads/usb3/lanes/usb3-1}>;
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
};
#else
[email protected]3530000 {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-1";
nvidia,boost_cpu_freq = <800>;
};
#endif
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
[email protected]3520000 {
status = "okay";
pinctrl-0 = <&vbus_en0_default_state>;
pinctrl-1 = <&vbus_en1_default_state>;
pinctrl-2 = <&vbus_en0_sfio_tristate_state>;
pinctrl-3 = <&vbus_en1_sfio_tristate_state>;
pinctrl-4 = <&vbus_en0_sfio_passthrough_state>;
pinctrl-5 = <&vbus_en1_sfio_passthrough_state>;
pinctrl-names = "vbus_en0_default", "vbus_en1_default",
"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough";
pads {
usb2 {
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
usb2-1 {
nvidia,function = "xusb";
status = "okay";
};
usb2-2 {
nvidia,function = "xusb";
status = "okay";
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "okay";
};
usb3-1 {
nvidia,function = "xusb";
status = "okay";
};
usb3-2 {
nvidia,function = "xusb";
status = "okay";
};
};
};
};
ports {
usb2-0 {
status = "okay";
mode = "otg";
vbus-supply = <&vdd_usb0_5v>;
nvidia,oc-pin = <0>;
};
usb2-1 {
status = "okay";
mode = "host";
vbus-supply = <&vdd_usb1_5v>;
nvidia,oc-pin = <1>;
};
usb2-2 {
status = "okay";
mode = "host";
vbus-supply = <&battery_reg>;//modify :org-vdd_usb2_5v
nvidia,oc-pin = <1>;//add
};
usb3-1 {
nvidia,usb2-companion = <1>;
status = "okay";
//add -s
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,lanes = "otg-2";
//add -e
};
};
};
#endif
[email protected]3520000 {
status = "okay";
pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
pinctrl-1 = <&vbus_en0_sfio_tristate_state>;
pinctrl-2 = <&vbus_en1_sfio_tristate_state>;
pinctrl-3 = <&vbus_en0_sfio_passthrough_state>;
pinctrl-4 = <&vbus_en1_sfio_passthrough_state>;
pinctrl-5 = <&vbus_en0_default_state>;
pinctrl-6 = <&vbus_en1_default_state>;
pinctrl-names = "default",
"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough",
"vbus_en0_default", "vbus_en1_default";
tegra_xusb_padctl_pinmux_default: pinmux {
/* Quill does not support usb3-micro AB */
usb2-micro-AB {
nvidia,lanes = "otg-0";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
nvidia,oc-pin = <0>;
};
usb2-std-A-port2 {
nvidia,lanes = "otg-1";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
usb3-std-A-port2 {
nvidia,lanes = "usb3-0";//modify :org- usb3-1
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
//add :usb3-std-A-port3
usb3-std-A-port3 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
e3325-usb3-std-A-HS {
nvidia,lanes = "otg-2";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";//modify :org-disabled
};
e3325-usb3-std-A-SS {
nvidia,lanes = "usb3-0";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
};
};
pcie-[email protected]10003000 {
status = "okay";
[email protected]1,0 {
nvidia,num-lanes = <2>;
status = "okay";
};
[email protected]2,0 {
nvidia,num-lanes = <1>;
status = "okay";//modify :org-disabled
};
[email protected]3,0 {
nvidia,num-lanes = <1>;
status = "okay";
};
};
- 修改tegra186-quill-p3310-1000-a00-plugin-manager.dtsi檔案,注釋掉以下程式段,更改如下:
//modify
/*
fragment-500-pcie-config {
ids = ">=3310-1000-500";
[email protected] {
target = <&tegra_pcie>;
_overlay_ {
[email protected],0 {
nvidia,num-lanes = <4>;
};
[email protected],0 {
nvidia,num-lanes = <0>;
};
[email protected],0 {
nvidia,num-lanes = <1>;
};
};
};
};
*/
/*modify
fragment-500-e3325-pcie {
enable-override-on-all-matches;
ids = ">=3310-1000-500";
odm-data = "enable-pcie-on-uphy-lane0";
[email protected] {
target = <&{/[email protected]}>;
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
_overlay_ {
phys = <&{/[email protected]/pads/usb2/lanes/usb2-0}>,
<&{/[email protected]/pads/usb2/lanes/usb2-1}>,
<&{/[email protected]/pads/usb2/lanes/usb2-2}>;
phy-names = "usb2-0", "usb2-1", "usb2-2";
};
#else
_overlay_ {
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>;
phy-names = "utmi-0", "utmi-1", "utmi-2";
};
#endif
};
[email protected] {
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
target = <&xusb_padctl>;
_overlay_ {
ports {
usb3-0 {
status = "disabled";
};
};
};
#else
target = <&tegra_xusb_padctl_pinmux_default>;
_overlay_ {
usb3-std-A-port2 {
status = "disabled";
};
};
#endif
};
[email protected] {
target = <&tegra_main_gpio>;
_overlay_ {
pcie0_lane2_mux {
status = "okay";
};
};
};
};*/
- 修改tegra186-quill-p3310-1000-c03-00-base.dts檔案,更改如下:
[email protected]2200000 {
sdmmc-wake-support-input {
status = "okay";
};
sdmmc-wake-support-output {
status = "okay";
};
//add : pcie0_lane2_mux
pcie0_lane2_mux{
status = "okay";
};
};
pcie-[email protected]10003000 {
[email protected]1,0 {
nvidia,num-lanes = <2>;//modify :org-4
nvidia,disable-clock-request;
status = "okay";//add
};
[email protected]2,0 {
nvidia,num-lanes = <1>;//modify :org-0
status = "okay";//add
};
[email protected]3,0 {
nvidia,num-lanes = <1>;
status = "okay";//add
};
};
[email protected]3530000 {
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>;
phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-0";
};
- 修改tegra186-quill-power-tree-p3310-1000-a00-00.dtsi檔案,更改如下:
[email protected]3520000 {
vbus-0-supply = <&vdd_usb0_5v>;
vbus-1-supply = <&vdd_usb1_5v>;
vbus-2-supply = <&battery_reg>;//modify :org-vdd_usb2_5v
vbus-3-supply = <&vdd_usb2_5v>;//modify :org-battery_reg
vddio-hsic-supply = <&battery_reg>;
avdd_usb-supply = <&spmic_sd3>;
vclamp_usb-supply = <&spmic_sd2>;
avdd_pll_erefeut-supply = <&spmic_sd2>;
};
以上修改完成,重新将核心代碼編譯後,再将裝置樹和鏡像燒錄到TX2中。
sudo ./flash.sh -r -K kernel/Image -d kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb -o 0x6090000 p2771-0000.conf.common jetson-tx2 mmcblk0p1
測試驗證
由于設計的PCIe是連接配接的百兆以太網網卡,是以在系統網絡設定裡會看到三個外擴的可用的以太網(電路設計的是外擴3個),連上網線測試可以上網。2個USB都可以接滑鼠鍵盤U盤等裝置。