CP210X 系類
官網位址
CP2102參考外圍電路
| Name | Pin # | Type | Description | 說明 |
| VDD | 6 | Power In Power Out | 3.0–3.6 V Power Supply Voltage Input. 3.3 V Voltage Regulator Output. | 3.0–3.6 V電源電壓輸入。 3.3V電壓調節器輸出。 |
| GND | 3 | Ground | 接地 | |
| RST | 9 | D I/O | Device Reset. Open-drain output of internal POR or VDD monitor. An external source can initiate a system reset by driving this pin low for at least 15 µs. | 裝置重置。内部POR或VDD螢幕的開漏輸出。外部電源可通過将該引腳低驅動至少15µs來啟動系統複位。 |
| REGIN | 7 | Power In | 5 V Regulator Input. This pin is the input to the on-chip voltage regulator. | 5 V調節器輸入。該引腳是片上電壓調節器的輸入。 |
| VBUS | 8 | D In | VBUS Sense Input. This pin should be connected to the VBUS signal of a USB network. A 5 V signal on this pin indicates a USB network connection. | VBUS感應輸入。此引腳應連接配接到USB網絡的VBUS信号。此引腳上的5 V信号表示USB網絡連接配接。 |
| D+ | 4 | D I/O | USB D+ | USB D接口+ |
| D- | 5 | D I/O | USB D– | USB D接口- |
| TXD | 26 | D Out | Asynchronous data output (UART Transmit) | 異步資料輸出（UART傳輸） |
| RTX | 25 | D In | Asynchronous data input (UART Receive) | 異步資料輸入（UART接收） |
| CTS | 23 | D In | Clear To Send control input (active low) | 清除發送控制輸入（低電平有效） |
| RTS | 24 | D Out | Ready to Send control output (active low) | 準備發送控制輸出（低有效） |
| DSR | 27 | D In | Data Set Ready control input (active low) | 資料集就緒控制輸入（低電平有效） |
| DTR | 28 | D Out | Data Terminal Ready control output (active low) | 資料終端就緒控制輸出（低電平有效） |
| DCD | 1 | D In | Data Carrier Detect control input (active low) | 資料載波檢測控制輸入（低電平有效） |
| RI | 2 | D In | Ring Indicator control input (active low) | 環形訓示燈控制輸入（低電平有效） |
| SUSPEND | 12 | D Out | This pin is driven high when the CP2102 enters the USB suspend state. | 當CP2102進入USB挂起狀态時，該引腳被驅動為高電平。 |
| SUSPEND | 11 | D Out | This pin is driven low when the CP2102 enters the USB suspend state | 當CP2102進入USB挂起狀态時，該引腳被驅動為低電平 |
| NC | 10,13-22 | These pins should be left unconnected or tied to VDD. | 這些引腳應保持不連接配接或與VDD相連。 |