#清明节游玩日记#
From the perspective of R&D expenditure, the absolute value of R&D investment of NAURA and AMEC is far less than that of the world's leading manufacturers, but from the perspective of proportion, AMEC's R&D investment accounts for the highest proportion of revenue, but behind the high R&D, the problem is that the proportion of R&D capitalization is very high, and if the capitalization expenditure is deducted, the net profit can be lost.
Of course, for fields with extremely high technical requirements, capitalization treatment can also be understood.
The capitalization of R&D expenses, which we have mentioned many times before, is also an important difference in the accounting standards of China and the United States.
Well, so much R&D investment has been made, so how much is the gap between China Micro Semiconductor and international giants?
The core indicator of chip manufacturing is the manufacturing process, that is, the fineness (unit: nm). The difference between the two machines is clear by the comparison of their maximum etching processes:
NAURA NMC612D - its maximum chip manufacturing process is 28nm, and the equipment has entered SMIC's production line;
AMEC's Primo nanova – covers 14nm, 7nm, and 5nm size etching applications, of which 7nm has entered TSMC's production line. The fineness of 5nm has been consistent with the current equipment level of international giants.
After studying so much, it seems that the gap between China Micro Semiconductor and international giants is not much, but in fact, the gap in technology is not so optimistic.
This level of finesse is not applied to all materials.
Currently, dry etching is classified according to the type of material being etched and is divided into three types: metal etching, dielectric etching, and silicon etching.
Dielectric etching is to separate the conductive part of a semiconductor device on an insulating material;
Metal etching, which is mainly used to connect and form various metal parts of integrated circuits;
Silicon etching, which is mainly used to remove unwanted silicon materials.
Note that silicon etching is the most difficult, it is the engraving of the underlying circuit structure, which is the most important part of the etching process, silicon etching is the etching of transistors, and the process directly defines the manufacturing process (fineness) of the semiconductor chip.
Therefore, let's focus on silicon etching, how difficult the technology of silicon etching is, and we use the index of silicon material to etch (Highly selective etch).
For example, a wafer is composed of multiple layers of material stacked on top of each other, etching only the top layer of material (Material 1) while ensuring that the lower layer of material (Material 2) is not etched. The ratio of the etching speed of material 1 to material 2 is called the "selection ratio", and the higher the selection ratio, the higher the technical process requirements.
Metal etching has the lowest selection ratio, between 4:1 and 20:1, followed by dielectric etching, between 20:1 and 50:1, and for silicon etching, due to the extremely small size of polysilicon gates, shallow groove isolation, etc., the accuracy requirements are extremely high, and the selection ratio should reach about 150:1.
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